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Design Verification Lead - SoC/System Verilog SEMI LEAF

8.0 - 10.0 years

0 Lacs

bengaluru, karnataka, india

On-site

Responsibilities Author verification plans from specs and micro-architecture; build reusable UVM environments from scratch at subsystem or SoC level. Develop constrained-random and directed tests, scoreboards, checkers, coverage models, and assertions (SVA). Drive coverage closure (functional, code, assertion), root-cause complex bugs, and work closely with RTL, architecture, and DFT. Enable SoC-level verification including interface/IP integration, coherency, low-power modes, resets/boot, and performance validation. Support silicon bring-up and correlation of failures to pre-silicon environments. Must-have Qualifications 8+ years of hands-on ASIC verification experience (FPGA or emulation-o...

Posted 1 month ago

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