266 Logic Design Jobs - Page 3

Role : AMS/Macro Circuit Engineer Work Location(Client): Hyderabad Years of experience: 1 -3 Years Qualification: Bachelors Degree Notice Period expectations : immediate to 45 Days Skills required Deep understanding of transistor and digital gate characteristics . Proficiency in AMS/High speed custom digital design. Experience in Hspice/Spectre simulators, Virtuoso schematics, layouts. Basic exposure to layout techniques. Automation using shell/perl/tcl or python is a must. Organized and methodical with effective communication skills. Responsibilities Design custom logic gates for Analog Mixed Signal macros. Create cells for full custom high speed digital logic. Debug functional and performa...

As Logic deisgn engineer for Power Management, you will be responsible for design and development of power management and sustainability features for high performance Processors chips. 1. Lead the Development of features - propose enhancements to existing features, new features, architecture in High level design discussions 2. Develop micro-architecture, Design RTL, Collaborate with the Verification, DFT, Physical design, FW, SW, Research teams to develop the feature 3. Guide junior engineers. Represent as Power engineer in various forums. 4. Signoff the Pre-silicon Design that meets all the functional, area and timing goals 5. Participate in silicon bring-up and validation of the hardwar 6....

As an experienced professional with 2-6 years of expertise in micro architecture design and system design using Verilog, SV, or VHDL, you will play a crucial role in this position. Your responsibilities will include: - Utilizing Spyglass Lint, CDC, SoC Integration, logic design with Verilog and SV, ASIC Synthesis, STA, timing closure, and working with any Processor based system. - Demonstrating familiarity with design using SoC, AXI/AHB/APB System bus, and peripherals such as Ethernet, PCIe, DDR, USB, UART, SPI, and I2C. - Conducting synthesis, timing analysis using various industry standard tools, and proficiency in TCL and Python scripting. To excel in this role, you should ideally possess...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm is hiring strong DV engineers to verify high performance and low power CPUs in Bangalore. Please forward your profiles if you meet the requirement. Roles and Responsibilities o Responsible for power management verification includes Boot, Reset, clock gating, power gating, Voltage/frequency management, limit management and throttling. o Work closely with design/verification teams within CPU to develop comprehensive test plan. o Use simulation and formal verification methodologies to execute test plans. Write checkers, assertions and develop stimulus. o Verify power intent through use of methodologi...

Job Specs : Expertise in ASIC RTL Design Expertise in ASIC IP Design Expertise in CDC and Lint tools Expertise in design and simulation tools Expertise in Video processing algorithms / interfaces Expertise in CXL / PCIe Protocol, 5G, Datacenter Expert level proficiency (Oral + Written) in Chinese language is mandatory incase Beijing, Vietnam are the preferred work locations Preferred resources with valid regional work permit.

Role & Responsibilities : Understand the design specification , PowerOn Specification, and Power management specification. Understand boot firmware and reset flow. And/or Power management flow. Develop skills in IBM BIST verification tools and apply them successfully Develop the verification environment and test bench Debug fails using waveform, trace tools and debug RTL code Work with Design team in resolving/debugging logic design issues and responsible for deliveries Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Required Professional and Technical Expertise : 3-8 years of experience in Design Verification - demonstra...

Understand the design specification, Power On Specification, and Power management specification. Understand boot firmware and reset flow. And/or Power management flow. Develop skills in verification tools and apply them successfully Develop the verification environment and test bench Debug fails using waveform, trace tools and debug RTL code Work with Design team in resolving/debugging logic design issues and responsible for deliveries Running regression checks and coverage analysis Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Experience in Design Verification - demonstrated execution experience of verification of logi...

As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Lead the development of the verification plans, environment, testbenches and writing testcases to verify Cache structures & protocols in processor. Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in debugging and fixing logic design issues and deliver a quality design Work with development team to ensure coverage criteria is met. Required education Master's Degree Required technical and professional expertise 5 + years of experience in Functional Verification of processors or ASICs. 3+ years of experien...

About The Role Project Role : Application Lead Project Role Description : Lead the effort to design, build and configure applications, acting as the primary point of contact. Must have skills : Design for Testability (DFT) Good to have skills : NAMinimum 15 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As an Application Lead, you will lead the effort to design, build, and configure applications, acting as the primary point of contact. Your typical day will involve collaborating with various teams to ensure that application requirements are met, overseeing the development process, and providing guidance to team members. You will also engag...

Understand the design specification, Power On Specification, and Power management specification. Understand boot firmware and reset flow. And/or Power management flow. Develop skills in verification tools and apply them successfully Develop the verification environment and test bench Debug fails using waveform, trace tools and debug RTL code Work with Design team in resolving/debugging logic design issues and responsible for deliveries Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Experience in Design Verification - demonstrated execution experience of verification of logic blocks Strong in SoC verificationChip reset se...

As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Lead the development of the verification plans, environment, testbenches and writing testcases to verify Cache structures & protocols in processor. Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in debugging and fixing logic design issues and deliver a quality design Work with development team to ensure coverage criteria is met. Required education Master's Degree Required technical and professional expertise 6 + years of experience in Functional Verification of processors or ASICs. 3+ years of experien...

Role Overview: You will be part of a team developing custom silicon solutions for Google's direct-to-consumer products. Your role will involve contributing to the innovation behind products used by millions worldwide, shaping the next generation of hardware experiences for unparalleled performance, efficiency, and integration. The Platforms and Devices team works on Google's computing software platforms and first-party devices and services, combining AI, software, and hardware to create innovative user experiences globally. Key Responsibilities: - Contribute to CPU front-end designs, focusing on microarchitecture and RTL design for the next-generation CPU. - Propose efficient microarchitectu...

Role Overview: You will be part of a team that develops custom silicon solutions for Google's direct-to-consumer products, contributing to the innovation of products used by millions globally. Your expertise will play a crucial role in shaping the next generation of hardware experiences, focusing on delivering high performance, efficiency, and integration. The Platforms and Devices team at Google works on various computing software platforms and first-party devices, combining Google AI, software, and hardware to create innovative user experiences worldwide. Key Responsibilities: - Contribute to Central Processing Unit (CPU) front-end designs, emphasizing microarchitecture and Register-Transf...

Responsibilities: As a Logic design lead in the IBM Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance low power targets of the Mainframe and / or POWER customers. Deep expertise in the implementation of functional units within the core / cache / Memory controller / Interrupt / crypto / PCIE / DLL ... Good understanding of HW / SW co design / accelerators to enhance system level performance. Collaborate with the Chip development, Unit Verification, Physical design, testgen, millcode teams to develop the feature. Pre-Silicon: Signoff the Design that meets all the functional, area and timing goals. Post Silico...

Responsibilities Conduct classes on Python programming Provide 1:1 and group support to students Train students in logic building Create notes and assignments. Preferred: Knowledge of NumPy, Pandas, Matplotlib, HackerRank, Leetcode. Health insurance Provident fund

Role Description: This is a full-time on-site role for a Senior Lead Physical Design Engineer based in Hyderabad. The Senior Physical Design Engineer will be responsible for tasks related to physical design, physical verification, logic design, circuit design, and RTL design in the development of silicon products. Qualifications: He/She should be able to do block level PNR including PG Planning, partitioning, placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure and ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, Antenna checks. Minimum of 7-15 years of exper...

Required Skills Experience in Logic design / RTL coding is a must. Experience is SoC design and integration for complex SoCs is a must. Experience in Verilog/System-Verilog is a must. Experience in Multi Clock designs, Asynchronous interface is a must. Experience in using the tools in ASIC development such as Lint and CDC. Experience in Synthesis / Understanding of timing concepts is a plus. Experience in ECO fixes and formal verification. Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset architecture. Excellent oral and written communications skills. Proactive, creative, curious, motivated to learn and contribute with good collaboration skills

Job role - Support SME (LogicMonitor SME) Experience - 6 to 9 years Location - Bangalore The LogicMonitor SME is responsible for providing expert-level knowledge and support for the LogicMonitor platform. This role involves designing, implementing, and optimizing LogicMonitor solutions to ensure efficient and effective monitoring of IT infrastructure. The SME will work closely with various teams to integrate LogicMonitor with other systems, optimize performance, and provide guidance on best practices. Key Responsibilities: Solution Design: Design and architect LogicMonitor solutions that align with business needs and best practices. Provide guidance on the implementation of new features and ...

Job Area :Engineering Group, Engineering Group > Hardware Engineering General Summary: Minimum 4 to 8 years of work experience in ASIC RTL Design, Synthesis, STA & FV Experience in Logic design/micro-architecture/RTL coding is a must. Must have hands on experience with design and integration of complex multi clock domain blocks Experience in Verilog/System-Verilog is a must. Should have knowledge of AMBA protocols - AXI, AHB, APB, clocking/reset/debug architecture Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required. Work closely with the Design verification...

Job Area :Engineering Group, Engineering Group > Hardware Engineering General Summary: As a CPU Performance Management FW Developer, you are responsible for working with a team on the enablement of the power management solution for Qualcomm's custom CPUs. You will collaborate internally to help define a standard driven solution, and implement embedded firmware, to manage performance of the CPU subsystem. You will also be responsible for helping characterize and tune this solution for all Qualcomm SoCs utilizing Qualcomm custom CPUs. In CPU Power Management FW developer role, with focus on CPU performance management, you will be working closely both with the hardware power management and firm...

Job Area :Engineering Group, Engineering Group > Hardware Engineering General Summary: Experience in Logic design /micro-architecture / RTL coding is a must. Must have hands on experience with SoC design and integration for complex SoCs. Experience inVerilog/System-Verilogis a must. knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Hands on experience in Multi Clock designs, Asynchronous interfa...

General Summary Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in. We are hiring talented engineers for CPU RTL development targeted for high performance, low power devices. As a CPU Micro-architecture and RTL Design Engineer, you will work with chip architects to conceive of the micro-architecture, and also help with ...

General Summary: 3 to 15 years of work experience in ASIC/SoC Design Experience in Logic design /micro-architecture / RTL coding is a must. Must have hands on experience with SoC design and integration for complex SoCs. Experience inVerilog/System-Verilogis a must. knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Hands on experience in Multi Clock designs, Asynchronous interface is a must. Expe...

As a Design Engineer-2 FPGA Architecture at Lattice Semiconductor, you will be part of a dynamic team focused on FPGA architecture modeling and system architecture advancements. You will have the opportunity to contribute, learn, innovate, and grow within a fast-paced, results-oriented environment. Your responsibilities will include working in RTL design, utilizing best-in-class coding styles, algorithms, and both Verilog and System Verilog. You will be involved in architecture modeling and evaluation of Lattice FPGAs and Software tools to measure performance, power, and area for various workloads. Additionally, you will drive subsystem development, ensuring designs meet high standards of qu...

Understand the design specification , Memory and Memory BIST engine connections Develop skills in IBM BIST verification tools and apply them successfully Develop the verification environment and test bench Debug fails using waveform, trace tools and debug RTL code Work with Design team in resolving/debugging logic design issues and responsible for deliveries Required education Bachelor's Degree Preferred education Bachelor's Degree Required technical and professional expertise 8+ years of experience in Design Verification - demonstrated execution experience of verification of logic blocks Strong in DFT Verification - Demonstrated execution experience of verification of Memory BIST Knowledge ...