318 Lint Jobs - Page 6

About The Role About The Role Should be good in Integration of SOC & RTL coding. Should be aware of SOC flow like Spyglass-Lint/Synthesis (DC)/CDC. Should be aware of scripting language. Candidate should have experience on SOC Integration, SpyGlass Lint, CDC, DC-Synthesis & VCLSP. Should have good understanding of SoC flows. Primary Skills: VHDL, Verilog,Micro-architecture, R TL coding,CDC, Lint, Synthesis, STA,IP development , SoC integration,VCLP,scripting -Perl,Python,Shell, and Tcl. Secondary Skills: Synopsis/Cadence tool flow,ARM Coretex,DMA, DDR, SPI, I2C, UART,AHB/AXI/APB,Ethernet, USB, PCIe,Mipi CSI/DSI, LPDDR. Education B.E/B.Tech/ Any Engineering.

Job Area :Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

Job Area :Engineering Group, Engineering Group > Hardware Engineering General Summary: Minimum 4 to 8 years of work experience in ASIC RTL Design, Synthesis, STA & FV Experience in Logic design/micro-architecture/RTL coding is a must. Must have hands on experience with design and integration of complex multi clock domain blocks Experience in Verilog/System-Verilog is a must. Should have knowledge of AMBA protocols - AXI, AHB, APB, clocking/reset/debug architecture Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required. Work closely with the Design verification...

Job Area :Engineering Group, Engineering Group > Hardware Engineering General Summary: Experience in Logic design /micro-architecture / RTL coding is a must. Must have hands on experience with SoC design and integration for complex SoCs. Experience inVerilog/System-Verilogis a must. knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Hands on experience in Multi Clock designs, Asynchronous interfa...

General Summary: 3 to 15 years of work experience in ASIC/SoC Design Experience in Logic design /micro-architecture / RTL coding is a must. Must have hands on experience with SoC design and integration for complex SoCs. Experience inVerilog/System-Verilogis a must. knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Hands on experience in Multi Clock designs, Asynchronous interface is a must. Expe...

General Summary: Job Function : Camera Design Lead/Staff Candidate will be responsible for design/developing next generation SoCs sub systems for mobile phone camera . Candidate will be working on ASIC based on the latest technology nodes. This role will require the candidate to understand and work on all aspects of VLSI development cycle like architecture, micro architecture, Synthesis/PD interaction and design convergence. Skills/Experience 5-10 years with Masters (6 to 10 years with Bachelors) Solid experience in digital front end design for ASICsSolid Expertise in RTL microarchitecture and design coding in Verilog/SV for complex designs with multiple clock and power domainsExpertise with...

General Summary: Responsibilities will include to be strong designer who is able to work independent on one of the peripheral IPs come up with design and microarchitecture solutions guide/mentor juniors engage with external teams to drive/resolve cross team dependencies. Take complete responsibility of one or more project and drive that independently. Being able to make schedule estimates is a plus. People management experience is a plus Skills & Requirements needed 3-6 years of work experience in ASIC IP cores design Required: Bachelor's, Electrical Engineering Preferred: Master's, Electrical Engineering Knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and ...

You have an exciting opportunity with Tessolve Semiconductor in Bangalore for the roles of RTL Design Engineer and Design Verification Engineer. For the position of RTL ASIC Engineer, you should have at least 7 years of work experience in ASIC/IP Design with expertise in Logic design and RTL design. Your responsibilities will involve IP design and integration, along with proficiency in tools such as Lint and CDC for ASIC development. Knowledge of Synthesis and understanding of timing concepts would be advantageous. Additionally, familiarity with AMBA protocols like AXI, AHB, APB, and SoC clocking/reset architecture is preferred. As a Design Verification Engineer, you are required to have 5 t...

The ideal candidate for this role should possess a strong understanding of RTL design and microarchitecture of IPs, with the ability to integrate them into sub-systems and SoCs. Responsibilities include defining the Uarch of SoC IPs, conducting RTL development, and ensuring the quality of RTL through checks such as Clock Domain Crossing (CDC) check, Lint, Design for Testability (DFT), and Low Power Checks. Additionally, the candidate will be involved in RTL synthesis, STA support, and provide pre and post-silicon functional verification support. Collaboration with different domain teams is essential for successful execution of tasks, along with a solid understanding of DDR knowledge. The can...

As a member of our team, you will play a key role in developing custom silicon solutions that drive the future of Google's direct-to-consumer products. You will be at the forefront of innovation, contributing to products that are cherished by millions globally. Your expertise will be instrumental in shaping the next wave of hardware experiences, delivering exceptional performance, efficiency, and integration. In your role within the platform IP team, you will be involved in designing foundation and chassis IPs for Pixel SoCs, including components such as NoC, Clock, Debug, IPC, MMU, and other peripherals. Collaboration with cross-functional teams such as architecture, software, verification,...

You should have 5 to 14 years of work experience in VLSI RTL IP or Subsystem design. Your main responsibilities will include designing and developing CXL and DRAM controller (DDR4/5) based intellectual property, engaging with other architects within the IP level to drive the Micro-Architectural definition, delivering quality micro-architectural level documentation, producing quality RTL on schedule by meeting PPA goals, being responsible for the logic design/RTL coding [in Verilog and/or System Verilog], RTL integration, and timing closure of blocks. You will collaborate with the verification team to ensure implementation meets architectural intent, run quality checks such as Lint, CDC, and ...

• Expertise in ASIC RTL Design • Expertise in ASIC IP Design • Expertise in CDC and Lint tools • Expertise in design and simulation tools • Expertise in Video processing algorithms / interfaces • Expertise in CXL / PCIe Protocol, 5G, Datacenter

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Enginee...

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Enginee...

Position Summary... As a Senior Software Engineer, you will be responsible for designing and developing new product features, supporting existing implementations and working with product, engineering, & business partners on new innovations. What you&aposll do... About Our Team - Data Ventures Data Ventures exists to unlock the full value of Walmarts data by developing and?productizing?B2B data?initiatives?that empower merchants and suppliers to make better, faster decisions for the business.? As part of this transformation, were seeking entrepreneurial individuals to help drive data productization from concept to deployment. Job Summary As a Senior Software Engineer, you will be responsible ...

You will be joining a dynamic and energetic team at Lattice, a global community of engineers, designers, and manufacturing operations specialists. Together with our world-class sales, marketing, and support teams, we are dedicated to developing cutting-edge programmable logic solutions that are revolutionizing the industry. Our core values revolve around research and development, product innovation, and exceptional customer service, which we deliver with unwavering commitment and a strong competitive drive. As a qualified candidate for the position based in Pune, India, you will play a crucial role in FPGA projects within the region. Your expertise in RTL design, coding best practices, algor...

As an RTL Design Engineer at Alphawave Semi, you will play a crucial role in the advancement of digital technology by contributing to the next generation Chiplet designs. You will be involved in the complete ASIC development cycle, from concept to product, and work on cutting-edge technologies that power innovation in data-demanding industries. Your responsibilities will include microarchitecting and RTL Design of SoC SubSystem/IP blocks, developing UPF and running CLP checks, ensuring RTL quality checks, creating documentation for hardware blocks, and collaborating with various teams to ensure the successful tapeout of high-quality SoCs. To excel in this role, you should possess a Bachelor'...

You should have a minimum of 12 years of experience in ASIC design, with proficiency in Verilog coding, RTL design, and creating complex control path and data path designs. It is essential to have knowledge of interface Protocols such as UCIe, PCIe, USB, MIPI(DPHY), HDMI/Display, Ethernet, and SATA. Familiarity with RTL checks including LINT, SDC, CDC, synthesis flow, LEC, and timing constraints is required. Experience in writing Verilog testbench and conducting simulations will be beneficial. At Cadence, we are seeking individuals who are passionate about technology and innovation. Join us in making a significant impact on the world of technology. Let's work together to solve challenges tha...

We are seeking an ASIC RTL Design Lead to join our team in Hyderabad at the earliest. The ideal candidate should possess over 10 years of experience and demonstrate expertise in the following areas: - Proficiency in RTL Design utilizing verilog - Experience in SoC and Subsystem integration, including the integration of peripherals such as PCIE, Ethernet, and USB - Ability to conduct front end flow environment bringup - Strong understanding of Flows, Lint, CDC, Synthesis, Formality, VCLP - Knowledge of tcl or perl scripting - Development of CDC and synthesis constraints, Timing analysis, Signoff If you meet these requirements and are interested in this opportunity, please send your profile to...

As a skilled professional with a Bachelor's degree in Electrical or Computer Engineering or equivalent practical experience, along with 6 years of expertise in ARM-based System on a chip (SoCs), interconnects, and Application-Specific Integrated Circuit (ASIC) methodology, you are well-equipped to take on the responsibilities of this role. Additionally, your 5 years of experience in Register-Transfer Level (RTL) design using Verilog/System Verilog and microarchitecture, coupled with your proficiency in a coding language like Python or Perl, make you an ideal candidate for this position. Ideally, you hold a Master's degree or a PhD in Electrical Engineering, Computer Science, or possess equiv...

You will be part of a highly skilled and challenging high-speed parallel PHY design team, working on interfaces such as DDR, LPDDR, etc. Your responsibilities will include designing and developing high-speed interface PHY and its sub-blocks, such as high-speed data paths, analog calibration, training, IP initialization, low power control, test, loopback, etc. You will be accountable for various aspects of design and verification from specification to silicon, as well as interface design for the controller and SoC. Your role will also involve active participation in problem-solving and implementing opportunities for improvement. Additionally, you will mentor and coach other design team member...

The ideal candidate for this position should have a minimum of 3 to 5 years of experience and possess strong core front-end skills including HTML5 (plus APIs), CSS3, JavaScript, and Responsive Web Development. Proficiency in CSS3 Pre-Processors like LESS or SASS, OOJS, and JavaScript Design Patterns is required. Experience in ES6 and using Babel Transpiler, as well as familiarity with MVC/MV- frameworks & libraries such as Angular, Ember, React or Vue, is essential. Proficiency in Version Control System, like Git, Web Services integration using AJAX, and knowledge of concepts like REST are also key requirements. Additionally, candidates should have experience with Code Quality Tools like LIN...

You should have experience in Logic design and RTL coding, as well as SoC design and integration for complex SoCs. Proficiency in Verilog/System-Verilog and Multi Clock designs including Asynchronous interfaces is essential. Familiarity with ASIC development tools such as Lint and CDC is required. Knowledge of Synthesis and understanding of timing concepts is a plus. Experience with ECO fixes, formal verification, and AMBA protocols like AXI, AHB, and APB, along with SoC clocking/reset architecture is necessary. Strong communication skills, proactive attitude, creativity, curiosity, motivation to learn, and good collaboration skills are expected. Your responsibilities will include understand...

Job Description for RTL We are hiring a SoC Integration Engineer with strong expertise in RTL coding and SoC integration flows. The ideal candidate should have hands-on experience with SpyGlass Lint, CDC, DC Synthesis, and VCLSP, along with scripting knowledge. Key Responsibilities: Integrate IP blocks into SoC at RTL level Perform RTL coding and micro-architecture design (Verilog/VHDL) Run and debug SpyGlass Lint, CDC, and DC Synthesis flows Conduct STA and design rule checks Develop automation scripts (Perl, Python, Shell, Tcl) Collaborate with verification and physical design teams Work on VCLSP and SoC-level integration flows Primary Skills: RTL Design: Verilog, VHDL, Micro-architecture ...

RTL Design Engineer 4+yrs experience Location: Hyderabad_onsite Malayasia Advanced RTL Design and DFT trainee, looking forward to build a career in the VLSI domain. To work with full determination and dedication, to achieve organization as well as personal goals. Skills : Verilog, Design for Testability (DFT), RTL Coding, STA, System Verilog, C, FPGA design Hands-on experience : Router 1x3 - Design using Verilog, RISCV32I Processor- RTL Design and DFT