318 Lint Jobs - Page 10

Dear Candidate, Seeking an Accessibility Engineer to ensure our web apps are inclusive and accessible to all users. Key Responsibilities: Audit and remediate accessibility issues. Implement ARIA roles, keyboard navigation, and screen reader support. Educate teams on accessibility best practices. Required Skills & Qualifications: Familiar with WCAG, WAI-ARIA, and accessibility tools. Experience in frontend development (HTML/CSS/JS). Strong understanding of UX for assistive technologies. Soft Skills: Strong troubleshooting and problem-solving skills. Ability to work independently and in a team. Excellent communication and documentation skills. Note: If interested, please share your updated res...

Responsibilities: * Develop RTL designs using Verilog, * Collaborate on ASIC projects from concept to delivery. * Ensure design compliance with industry standards. For fast response Share to mansoor@hisoltech.com

As an experienced professional with 7-9 years of experience, you will be responsible for executing customer projects independently with minimal supervision in the field of VLSI Frontend Backend or Analog design. Your role will involve guiding team members technically and taking ownership of specific tasks/modules related to RTL Design, Module Verification, PD, DFT, Circuit Design, Analog Layout, STA, Synthesis, Design Checks, and Signoff. You will lead the team to achieve results, complete assigned tasks successfully and on-time, and anticipate, diagnose, and resolve problems as necessary. Your responsibilities will also include ensuring on-time quality delivery approved by the project manag...

Responsibilities: * Develop RTL designs using Verilog, Synthesis with SpyGlass & LINT checks. * Collaborate on ASIC projects from concept to delivery. * Ensure design compliance with industry standards. Apply & Share to mansoor@hisoltech.com

Front End Integration of Digital, Analog IPs and Subsystems to build complete SoC Netlist. IOMUX and Padring generation and integration. Design of SoC Specific Logic IPs. Perform quality checks like Lint and CDC at SoC level. Implement all feedback from Verification and Physical Design teams for all changes required. Develop SoC level Testbench for RTL and Postlayout Simulations. Collaborate with ATE and Test teams and deliver test patterns for Probe and Package level testing. Support Verification and Post-Silicon Debugging of issues. Experience and Skills Required 10-15 Years Experience in front end integration for complex SoCs. Strong scripting skills. Hands on experience in RTL coding, Li...

Development of Specifications, Micro Architecture, RTL Development for Digital IPs. Setup and use standard EDA tools for Verification, Lint CDC, Synthesis, Power Analysis tools for Verification and Ensuring PPA for IP developed. Conduct Reviews for Documentation, RTL and Verification Tests. Experience and Skills Required 5 to 15 years of experience in SoC/IP Design. Expertise in Writing Detailed IP Specifications, Micro Architecture, IP design, Subsystem and SoC level integration. Expertise on RTL Development. Follow Coding Standards, expertise on Lint, CDC tools, verification and debugging of test cases, code and functional coverage analysis. In-depth knowledge of Clocking Methodology, Low ...

Job Title: SoC Design lead/manager Expectation: 12+ Years of relevant industry experience in multiple SoC designs Strong technical background in driving SoC design independently Experience in processor system integration, NoC design and integration, Good understanding of high-speed protocols such as PCIe/DDR/HBM/Ethernet etc.. Strong experience with AXI/AHB bus protocols. Defining sign-off quality design constraints for SoC. Hands-on expertise with low-power design techniques such as UPF/CPF. Experience in Security aspects in SoC [secure JTAG, encryption/decryption] &secure boot design. Experience in Lint/CDC checks Hand-on experience in Verilog HDL, System Verilog, C/C++ Drive one or more t...

We are looking for experienced RTL Integration Engineers to join our team and contribute to cutting-edge semiconductor designs. If you have a passion for SoC integration and front-end design methodologies, we want to hear from you! Key Responsibilities: Deliver RTL Subsystems and/or top-level SoC RTL across multiple projects Expertise in RTL database management, partitioning, and third-party IP integration Work with lint, DFT, UPF, synthesis, timing, and power analysis Address SoC integration challenges at both subsystem and full-chip levels Integrate Digital IPs such as PCIe, SDIO, USB, and ARM processors with protocol expertise Design top-level clock/reset circuits and manage memory select...

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Experience in Logic design /micro-architecture / RTL coding is a must. Must have hands on experience with SoC design and integration for SoCs. Experience in Verilog/System-Verilog is a must. Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in constraint development and timing closure Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on ...

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 2 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog. Experience with logic synthesis techniques to optimize RTL code, performance and power, and low-power design techniques. Experience with a scripting language such as Perl or Python. Preferred qualifications: Master's degree or PhD in Electrical Engineering, Computer Science, or equivalent practical experience. Experience implementing image/video processing blocks or other multimedia IPs such as Display ...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Skills & Experience MTech/BTech in EE/CS with 7+ years of ASIC design experience. Experience in micro-architecture development, RTL design, front-end flows (Lint, CDC, low-power checks, etc.), synthesis/DFT/FV/STA Good understanding of DDR families (LP/PC) and generations (DDR2/3/4/5/6) is added advantage. Understanding of protocols like AHB/AXI/ACE/CHI is desirable. Experience with post-silicon bring-up and debug is a plus. Able to work with teams across the globe and possess good communication skills. Hands on experience in Multi Clock designs, Asynchronous interface is a must. Hands on experience in Low...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

Key Responsibilities : Lead and manage RTL design activities for complex ASICs, ensuring high performance and low power consumption. Integrating RTL components into System-on-Chip (SoC) designs Integrating RTL components into System-on-Chip (SoC) designs Architect and implement RTL for digital circuits (such as processors, communication systems, or custom IP cores). Mentor and guide junior RTL engineers in best practices for design, coding standards, and optimization techniques. Develop and refine RTL code in Verilog/SystemVerilog for ASIC development. Collaborate with cross-functional teams (Verification, Physical Design, and Software) to ensure successful integration of the ASIC design. Pe...

Expertise and strong hands-on experience in RTL design using System Verilog or VHDL Digital system architecture, Processor subsystem architecture and block definition,complex SoCs, RTL design quality analysis – Lint, CDC, RDC,DFT,simulation,

Required Skills Experience in Logic design / RTL coding is a must. Experience is SoC design and integration for complex SoCs is a must. Experience in Verilog/System-Verilog is a must. Experience in Multi Clock designs, Asynchronous interface is a must. Experience in using the tools in ASIC development such as Lint and CDC. Experience in Synthesis / Understanding of timing concepts is a plus. Experience in ECO fixes and formal verification. Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset architecture. Excellent oral and written communications skills. Proactive, creative, curious, motivated to learn and contribute with good collaboration skills

Job Description: We are looking for a RTL Design Engineer with expertise in SoC and IP-level design and integration. The ideal candidate should have a strong background in RTL coding, architecture-level understanding, and industry-standard quality checks and tools. Key Responsibilities: Develop RTL code in Verilog/SystemVerilog Understand and apply top-level SoC architecture concepts Perform SoC and IP-level integration Implement RTL quality checks including CLP (mandatory), LINT, CDC, RDC, VSI Work on design partitioning (Tilification) Handle IORING, PHYs, GPIOs Collaborate with verification and backend teams Required Skills: RTL coding in Verilog and SystemVerilog IPXACT knowledge Clock Do...

• Design Methodology, Micro-architecture, RTL. • Work with the architecture team to develop the uArch & Subsequently write RTL. • Develop Design Methodology, starting with the machine learning architecture. • Synthesis, STA, Equivalence checking. Required Candidate profile * EXP in SOC design methodology, Micro-architecture, Emulation & back-end DEV., & Chip Bring-up. * EXP in Developing ARM CPU based SoCs, Network-on-Chip & interfaces such as MIPI-CSI, Ethernet & PCIe

We are seeking a skilled SoC Frontend Design Engineer to join our integrated circuit (IC) design team. Will be focusing on RTL design, digital logic design, synthesis, linting, timing analysis, and verification for ASIC projects. Work closely with cross-functional teams to deliver high-quality and efficient SoC (System on Chip) designs. This role requires good knowledge of VHDL/Verilog, verification methodologies, testbench development, and debugging. You have: Bachelors Degree in Electrical, Computer Engineering, or a related field (Masters preferred) 3+ years of experience in RTL design and digital logic design. Proficiency in VHDL/Verilog for RTL design. Strong knowledge of digital logic ...

Android Lead Responsibilities : 1. Responsible for robust and efficient implementation 2. Suggest technical solutions for short and long term 3. Candidate will be able to build and integrate android libraries and modules 4. Candidates will be able to design, build, and maintain high performance, reusable, and reliable Android/Java code. Responsible for robust and efficient implementation 5. Candidate will be able to debug skills and ability to solve issues of subordinates 6. Must ensure the best possible performance, quality, and responsiveness of the application, identify and correct bottlenecks and fix bugs. 7. Design and develop high-quality code. 8. Participate and lead software design m...

1+ Yrs Experience working on modern front-end web technologies, including: React, JS(ES6+) TypeScript, Next.js, HTML5, CSS3 and Less/Sass ability to write mixins, partials, functions, etc developing highly-optimized applications using React and Redux Required Candidate profile Experience interning in the E-Commerce Experience with the standard tooling Webpack, Babel, Linting, JS Typing, and Prettier. Experience in Caching

Experienced in rtl design using verilog / system Verilog Asic designers with experiences in all aspects of rtl design flow from specification/microarchitecture definition to design and verification, timing analysis, dft and implementation Integration, rtl signoff tools, upf/low power signoff and cdc/rdc, lint Strong domain knowledge of clocking, system modes. Power management, debug, interconnect, safety, security and other architectures

3+Yrs Exp.Android device platform, Proficient In Kotlin Language knowledge of design patterns like MVP, MMVM, RxJava, and others knowledge of Android SDK, NDK, Android Studio, Gradle, and Lint Knowledge of Flutter or React native will be an advantage Required Candidate profile Candidate will be able to build and integrate android libraries and modules and design-build and maintain high performance reusable java and OOPS concept

8+Yrs Exp.Android device platform, Proficient In Kotlin Language knowledge of design patterns like MVP, MMVM, RxJava, and others knowledge of Android SDK, NDK, Android Studio, Gradle, and Lint Knowledge of Flutter or React native will be an advantage Candidate will be able to build and integrate android libraries and modules and design-build and maintain high performance reusable java and OOPS concept

Responsibilities : 1. Responsible for robust and efficient implementation 2. Suggest technical solutions for short and long term 3. Candidate will be able to build and integrate android libraries and modules 4. Candidates will be able to design, build, and maintain high performance, reusable, and reliable Android/Java code. Responsible for robust and efficient implementation 5. Candidate will be able to debug skills and ability to solve issues of subordinates 6. Must ensure the best possible performance, quality, and responsiveness of the application, identify and correct bottlenecks and fix bugs. 7. Design and develop high-quality code. 8. Participate and lead software design meetings and a...