9 Level Shifters Jobs

Senior Physical Design Engineer Physical Design >> Senior Physical Design Engineer Post Senior Physical Design Engineer Required Experience 5 to 10 Years Location: Delhi NCR, Bangalore, Hyderabad Openings 8-10 Education BE/B.Tech./MS/M.Tech.(Electronics or Electronics & Communication) Physical Design Engineer knowledge of PD Flow from netlist to GDS (Floorplanning, Synthesis, Power Planning, Placement & Optimization, CTS, Routing, ECO steps, Timing/SI) Good idea about OCV/MMMC and multi power designs (Level shifters, Isolation cells etc) Should have worked extensively on XTalk/SI/EM Knowledge about CTS, Clock tree methodology and clock skewing. Tool specific knowledge: ICC, innovus, primetim...

Why Multi Phase Power MPP product line offers high performance, innovative and cost-effective power solutions for a broad range of customer applications in enterprise, communications and automotive which include multiple phase DC/DC controllers, smart power stages. In MPP, our mission is to power the processors that power AI & future servers. Target platforms include Intel, AMD, ARM, NVidia and custom ASIC/FPGAs from various vendors. We are looking for an Analog Design Lead / Senior Design Engineers who have the passion and excitement to grow, innovate, take an active role in designing high current Power stage ICs. This is a fast paced, results driven environment that requires broad knowledg...

Role Overview: As a Senior Analog Circuit Design Engineer/Lead at Eximietas Design, you will be responsible for designing various analog/mixed-signal circuits to meet target specifications. You will also be involved in layout of the designed circuits, analyzing the impact of parasitics on circuit specifications, measuring the design on hardware, and analyzing the results. Additionally, you will be expected to understand the critical circuit specifications essential for achieving system-level performance and contribute to automation and efficiency projects. Key Responsibilities: - Designing various analog/mixed-signal circuits to meet target specifications. - Conducting layout of the designed...

As a Physical Verification Engineer for SOC/blocks, your role involves performing physical verification for SOCs, cores, and blocks, which includes tasks such as DRC, LVS, ERC, ESD, DFM, and tapeout processes. You will be responsible for addressing critical design and execution challenges related to physical verification and sign-off. It is essential for you to have a comprehensive understanding of physical verification and sign-off workflows and methodologies. Collaboration with PNR engineers to achieve sign-off at various stages of the design process is also a key aspect of your role. Your qualifications and skills should include proficiency in physical verification for SoC/full-chip and b...

We are hiring Flash/Analog NVM Memory Design Engineers with 5+ years of experience in Bangalore. The ideal candidate must have experience in Flash memory design, SRAM, and analog basics including charge pumps, regulators, and level shifters. Strong debugging and communication skills are essential. Responsibilities: Design, development, and validation of Flash/Analog NVM memory blocks. Quickly ramp up with memory design and architecture. Work on memory design involving Flash, SRAM, and Analog NVM. Apply strong analog design basics including charge pumps, regulators, low-voltage analog, and level shifters (LS). Perform debugging and ensure robust design quality. Collaborate with cross-function...

As an Analog Design Lead/Senior Design Engineer at MPP, you will be responsible for designing high current Power stage ICs that power processors for AI and future servers. Your role will involve collaborating with IC development teams and contributing to the delivery of competitive, cost-conscious, and successful products to the market. You should possess a Bachelor's/Master's Degree in EE and have at least 5 years of experience in Analog Design. Your responsibilities will include transistor level design, taping out complex IPs, designing analog circuits, collaborating with digital designers, leading chip development, and providing silicon debugging solutions. Preferred qualifications for th...

You will be joining Eximietas Design as a Senior Analog Circuit Design Engineer/Lead with 4-15 years of experience. You should have a strong background in CMOS Analog design fundamentals, including designing circuit blocks such as OTA, Charge Pump, Bandgap Reference, Ring Oscillator, LC-VCO, etc. Additionally, you will be working on designing SERDES blocks like TIA, DRV, P2S, Serializer, RCOMP, Calibration blocks, Receiver Front end, CTLE, DFE, CDR Loop, Phase Interpolators, Deserializer, S2P, FFEs, Pre drivers, level shifters, V2I circuits Slicers, Samplers, and other custom building blocks. Proficiency in using Cadence Virtuoso Schematic and Layout editors is required, along with a good un...

Greetings from Eximietas Design! We are looking for a Senior Analog IC Circuit Lead/Architect with 8-15 years of experience to join our team in Bengaluru & Visakhapatnam. As a potential candidate, you should possess a strong background in CMOS Analog design fundamentals. Your expertise should cover designing various circuit blocks such as OTA, Charge Pump, Bandgap Reference, Ring Oscillator, LC-VCO, etc. Additionally, experience in designing SERDES blocks like TIA, DRV, P2S, Serializer, RCOMP, Calibration blocks, Receiver Front end, CTLE, DFE, CDR Loop, Phase Interpolators, Deserializer, S2P, FFEs, Pre drivers, level shifters, V2I circuits Slicers, Samplers, and other custom building blocks ...

Designing and optimizing standard cell libraries to achieve targeted PPA. Developing complex circuits including flip-flops, clock gating cells, level shifters, and power gating cells. Collaborating with layout designers to optimize layout parasitics. Engaging in layout extraction and understanding layout-dependent parameters. Conducting timing and power characterization of standard cells. Working closely with cross-functional teams for optimization across the design chain. The Impact You Will Have: Enhancing the performance, power, and area of standard cell libraries. Contributing to the development of high-impact, cutting-edge technology. Driving innovation in complex circuit design and opt...