116 Lec Jobs - Page 2

We are seeking highly motivated, energetic, and team-oriented individual contributors who can work on synthesis, LEC, and constraints for NXPs digital IPs, working in close collaboration with the RTL team. Key Responsibilities Work closely with the architects and RTL team on synthesis, LEC, and constraints of NXP digital IPs Carry out floor planning, and physically aware synthesis on high-performance IPs Perform timing and power analysis on the design database (db), improve the recipe, and provide timing feedback to the RTL team Leads or solo owners are expected to work with minimal micro-management needs. They should be able to communicate with other project members to manage task divisions...

Responsible for planning and execution of all aspects of Physical Design including Synthesis, Floor planning, Place and Route, Clock Tree Synthesis, IP integration, Extraction, Physical Verification, and taking blocks to the closure. Job Description In your new role you will: Responsible for planning and execution of all aspects of Physical Design including Synthesis, Floor planning, Place and Route, Clock Tree Synthesis, IP integration, Extraction, Physical Verification, and taking blocks to the closure. Design Application Engineering (DAE) will be responsible for supporting project teams using Infineon Design System (Flows, Design Package & Design assistance). You will be the first point o...

Experience in architecting and developing complex scalable software tools right from idea-to-production with a very good design architecture/pattern. Job Description In your new role you will: Develop Infineon's shift left methodologies like top level connectivity, Power methodologies Define data sources, data flow, develop and constantly optimize the generator to achieve maximum performance, feature set and maintainability. Improve existing software modules including refactoring and maintenance of existing code. Support our worldwide user community. Write technical documentation. Mentor junior developers Your Profile You are best equipped for this task if you have: Approximately 6+ years of...

Expert in implementing Scan insertion, LPCT, LBIST, Hybrid-TK, Compression Logic and DRC analysis of implemented Testability logic structures. In your new role you will: Responsible for SoC DFT Architecture definition/implementation/verification/silicon debug of SoC/Full Chip. Need to implement Scan insertion, LPCT, LBIST, Hybrid-TK, Compression Logic and DRC analysis of implemented Testability logic structures. Responsible for ATPG, DRC analysis, Test coverage debug, Memory BIST implementation and verification. Owner ship of JTAG/BSCAN/iJTAG, P1500 implementation and verification, Stuck-at/TDF/Bridging/Cell-aware/iddq fault models. Good debug skills in ZERO delay and SDF based scan/MBIST/JT...

Job Description A layout technical expert taking chip top ownership of analog-on-top ASIC developments. Hands-on technical contributor, able to take chiptop ownership including tape-out procedures. A teamplayer, able to collaborate within a global layout team and cross-discipline stakeholders. Required experience: 15+ years of experience in custom analog layout Experience with nodes in the range of 22nm-40nm-180nm is a must. Experience with BCD technologies is a must. Proven track record of owning chip top layout. Must be able to independently go through required tape-out procedures and take corrective actions. Must be able to take ownership of internal layout flows, continuously work on imp...

Working experience in Physical Design implementation areas including Synthesis, LEC, and PnR as well as good exposure to signoff areas, particularly power, timing, and IR signoff. Job Description In your new role you will: Responsible for planning and execution of all aspects of Physical Design including Synthesis, Floor planning, Place and Route, Clock Tree Synthesis, IP integration, Extraction, Physical Verification, and taking blocks to the closure. Design Application Engineering (DAE) will be responsible for supporting project teams using Infineon Design System (Flows, Design Package & Design assistance). You will be the first point of contact for project teams in case of issues and will...

Experience with low-power ASIC design techniques and clock domain crossing Knowledge of AMS verification methodologies Exposure to silicon bring-up and lab validation Familiarity with EDA tools from Synopsys, Cadence, or Mentor Bachelors or Masters degree in Electronics Engineering, Computer Engineering, or related field 8+ years of experience in ASIC digital design, with couple of years of technical leadership role Strong expertise in RTL design, CDC, synthesis, STA, LEC.. Proven experience in mixed-signal ASICs for deep sub-micron and understanding of analog-digital interfaces Familiarity with any scripting languages Excellent problem-solving, communication, and leadership skills Key Respo...

Role Overview: As a Qualcomm Hardware Engineer at Qualcomm India Private Limited, you will play a crucial role in planning, designing, optimizing, verifying, and testing electronic systems. Your responsibilities will involve working on yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to launch cutting-edge products. You will collaborate with cross-functional teams to develop solutions and ensure performance requirements are met. Key Responsibilities: - Work with multiple SOC Design teams to rollout robust Logic Synthesis, UPF synthesis, QoR optimization, and netlist Signoff flows - Provide implementation f...

As a Qualcomm Hardware Engineer, your role involves planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, and various other cutting-edge technologies to launch world-class products. You will collaborate with cross-functional teams to develop solutions and meet performance requirements. Key Responsibilities: - Complete ownership of PNR implementation including Floorplanning, Placement, CTS, and post_route on the latest nodes - Mandatory signoff knowledge including STA, Power analysis, FV, low power verification, PV, etc - Quick learner with good analytical and problem-solving skills Qualifications Required: - Bachelor's degree in Computer Sc...

Role Overview: You will be responsible for leading the architecture, design, and verification of digital blocks for mixed-signal ASICs. Your role will involve collaborating closely with Analog and System teams, guiding RTL design, optimizing power, performance, and area, and contributing to IP reuse strategy and design methodology improvements. Additionally, you will provide technical leadership across cross-functional teams and support post-silicon validation. Key Responsibilities: - Lead the architecture, design, and verification of digital blocks for mixed-signal ASICs - Collaborate closely with Analog and System teams to define specifications and ensure seamless integration - Drive RTL d...

Role Overview: You will be responsible for ASIC RTL design with 10+ years of experience and proficiency in Verilog/System Verilog. Your role will involve working with multiple clock and power domains, integrating and validating various MIPI cores, debugging, and implementing CSI/DSI controllers. Additionally, you will be creating micro-architecture specifications, reviewing vendor IP integration guidelines, running integrity check tools, and participating in design verification and physical implementation processes. Key Responsibilities: - Possess 10+ years of ASIC RTL Design experience and proficiency in Verilog/System Verilog - Work with multiple clock and power domains - Integrate and val...

As a VLSI Design Engineer at MarvyLogic, you will be responsible for the design and integration of ARM-based processor SOC and subsystem. Your role will involve utilizing your solid experience in digital VLSI design and ensuring a good understanding of Multi-processor and cache designs. Your hands-on coding experience in Verilog/VHDL will be essential for this position. Additionally, familiarity with various ARM AMBA protocols such as AXI, AHB, and cache coherency protocols is required. Key Responsibilities: - Design and integration of ARM-based processor SOC and subsystem - Utilize solid experience in digital VLSI design - Ensure a good understanding of Multi-processor and cache designs - H...

As a Qualcomm Hardware Engineer at Qualcomm India Private Limited, your role involves planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, and various other cutting-edge technologies to launch world-class products. You will collaborate with cross-functional teams to develop solutions and meet performance requirements. Key Responsibilities: - Plan, design, optimize, verify, and test electronic systems, circuits, and mechanical systems - Bring-up yield, Digital/Analog/RF/optical systems, equipment and packaging - Develop and test systems such as FPGA and/or DSP systems - Collaborate with cross-functional teams to meet performance requirement...

Working experience in Physical Design implementation areas including Synthesis, LEC, and PnR as well as good exposure to signoff areas, particularly power, timing, and IR signoff. Job Description In your new role you will: Responsible for planning and execution of all aspects of Physical Design including Synthesis, Floor planning, Place and Route, Clock Tree Synthesis, IP integration, Extraction, Physical Verification, and taking blocks to the closure. Design Application Engineering (DAE) will be responsible for supporting project teams using Infineon Design System (Flows, Design Package & Design assistance). You will be the first point of contact for project teams in case of issues and will...

You will be joining Broadcom Central Engineering team as a Multi Skilled RTL, Verification engineer with DFT expertise. You will have the opportunity to work in domains such as RTL, Verification, and DFT for Complex Memory, IO subsystems, and Hierarchical Blocks including BIST. This role offers a great opportunity for individuals who are eager to deepen their knowledge in end-to-end Chip development flow with specialized expertise in DFT and Memory BIST, eBIST. **Key Responsibilities:** - Perform RTL development and Verification for Digital subsystems, Memory Subsystems including BIST. - Execute DFT Insertion and Verification signoff for IO, ARM-PNR, Memory Digital Subsystems utilizing Tesse...

Role Overview: As a member of our dynamic team, you will contribute to the development of custom silicon solutions that drive the future of Google's direct-to-consumer products. Your role will be pivotal in innovating products that are globally cherished, influencing the next wave of hardware experiences to deliver exceptional performance, efficiency, and integration. You will work towards Google's mission of organizing the world's information and making it universally accessible and useful, synergizing the best of Google AI, Software, and Hardware to craft profoundly beneficial experiences. The team is dedicated to researching, designing, and advancing new technologies and hardware to enhan...

3+ years experience Synthesis and STA Engineers Experience with power analysis using power artist and PTPX Experience with sign off static timing analysis, static low power checks, logic equivalency checks Static timing analysis and ECO flows and achieve timing closure

Job Responsibilities: • Architectural review & planning, Installation of SC & LEC (High Availability) & DR configuration, Edge synchronization, post Installation tasks, DB configurations, fine tunings, upgrading, development, remote technical support, troubleshooting and Administration of Axway Secure Transport on various platforms Linux and Windows. • Install/Review latest fix packs for Axway ST whenever needed. • Integration with MFT OI/DI. • Creation of OOTB dashboards, watched participants and overview of MFT OI usage to Application Owner’s. • Requirement gathering, Review of Implementation and its dependencies. • Create and configure Axway Secure Transport accounts and Transfer sites. •...

As an experienced ASIC RTL Design Engineer at MarvyLogic, you will be responsible for designing cutting-edge solutions that impact various industries. Your role will involve working with multiple clock and power domains, integrating and validating MIPI cores, debugging, and implementing CSI/DSI controllers. Your expertise in Verilog/System Verilog will be crucial in creating micro-architecture specifications, reviewing vendor IP integration guidelines, and running integrity check tools to ensure compliance with coding standards. Additionally, you will play a key role in the design verification and physical implementation processes to meet performance goals. **Key Responsibilities:** - Utiliz...

As a Hardware Engineer at Qualcomm India Private Limited, you will be responsible for the physical design aspects of ASICs, including Place and Route (PnR) flow and methodology. Your key responsibilities will include: - Executing complete PD ownership from netlist to GDS2, encompassing HM level PV, LEC, low-power checks, PDN, and STA closure - Implementing Voltage Islands and low power methodologies, flows, and implementation - Debugging Congestion and Clock Tree Synthesis (CTS) issues - Utilizing PnR tools such as Innovus/Fusion compiler and flow - Familiarity with Sign-off methodologies and tools (PV/PDN/STA/FV/CLP/Scan-DRC(tk)) - Enhancing existing methodologies and flows - Proficiency in...

General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer ...

General Summary: Job Function : Camera Design Lead/Staff Candidate will be responsible for design/developing next generation SoCs sub systems for mobile phone camera . Candidate will be working on ASIC based on the latest technology nodes. This role will require the candidate to understand and work on all aspects of VLSI development cycle like architecture, micro architecture, Synthesis/PD interaction and design convergence. Skills/Experience 5-10 years with Masters (6 to 10 years with Bachelors) Solid experience in digital front end design for ASICsSolid Expertise in RTL microarchitecture and design coding in Verilog/SV for complex designs with multiple clock and power domainsExpertise with...

Qualcomm India Private Limited is a leading technology innovator that is at the forefront of pushing the boundaries of what's possible to enable next-generation experiences and drive digital transformation towards creating a smarter, connected future for all. As a Qualcomm Hardware Engineer, your role will involve planning, designing, optimizing, verifying, and testing electronic systems. This includes working on a variety of systems such as yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to launch cutting-edge, world-class products. Collaboration with cross-functional teams to develop solutions and meet ...

High Performance DSP core Implementation(Synthesis) Senior Lead Engineer General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experien...

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Experience: Minimum 2 years of hands-on experience in Synthesis and LEC Job Role Should have strong understanding and in-depth knowle...