Sr Analog Layout Engineer Ubique Systems

5.0 - 9.0 years

0 Lacs

hyderabad, telangana

On-site

Xeedo Technologies is looking for a Senior Analog Layout Engineer with 5 to 8 years of experience to join the team in Phoenix Aquila, Hyderabad, India. In this role, you will be working on-site for Micron Technology, a global semiconductor leader. Your responsibilities will include owning analog/custom layout blocks, performing physical verification, and collaborating with global design teams to ensure successful project execution and tape-outs. You will be responsible for designing and developing analog and custom digital layout blocks in advanced CMOS technologies. This will involve using Mentor Graphics Calibre for full physical verification, including DRC, LVS, and Antenna checks. Your goal will be to achieve first-pass silicon success by employing high-quality layout practices and thorough verification techniques. You will need to interpret circuit schematics to create optimized layouts for power, area, performance, and reliability. Additionally, you will be expected to plan, estimate, and track layout tasks to meet project milestones and delivery schedules. Collaboration with cross-functional and global teams to resolve design and integration issues will also be a key part of your role. Furthermore, you will review work and mentor junior layout engineers as needed. The ideal candidate will have 5 to 8 years of hands-on experience in analog/custom layout design, proficiency in Cadence VLE/VXL layout tools, and strong experience with Mentor Graphics Calibre for DRC/LVS/Antenna verification. You should have hands-on experience in designing various analog blocks such as PLL, Bandgap, LDO, Temperature Sensors, ADC, DAC, Charge Pumps, Current Mirrors, Comparators, etc. A strong knowledge of layout principles including Matching, IR-drop, Electromigration, Parasitics, Latch-up, Crosstalk, and Coupling is required. Experience with multi-project environments and multiple successful tape-outs is also essential. Preferred skills for this role include familiarity with custom memory layout methodologies and experience in designing layout for Bit cells, leaf cells, sense amps, decoders, and control logic. The educational qualification required is BE/BTech or ME/MTech in Electronics, Electrical, or VLSI Engineering. If you are passionate about Analog Layout and eager to contribute to complex and cutting-edge semiconductor designs for a global client, this is an exciting opportunity for you to consider.,

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