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2.0 - 12.0 years

0 Lacs

karnataka

On-site

Qualcomm India Private Limited is seeking a Layout Engineer to develop block, macro, or chip level layouts and floorplans in alignment with project requirements, specifications, and design schematics. As a Layout Engineer, you will utilize your understanding of design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs. Your responsibilities will include conducting analyses, tests, and verifications using various tools and techniques to identify and troubleshoot issues, while staying updated on new verification methods. Collaboration with multiple internal and external stakeholders is essential to align on projects, provide updates, and resolve any issues that may arise. The ideal candidate for this role will hold a Bachelor's degree in Electrical Engineering, Computer Science, Mathematics, Electronic Engineering, or a related field, along with a minimum of 2 years of experience in designing custom layouts in a relevant domain such as analog, mixed signal, RF, or digital design. Alternatively, an Associate's degree with 4+ years of relevant experience or a High School diploma with 6+ years of relevant experience will also be considered. Additionally, candidates should have at least 2 years of hands-on experience using layout design and verification tools like Cadence, LVS, and rmap. Candidates with a solid experience ranging from 8 to 12 years in developing high-speed IO/ESD/Analog layout design are preferred. Expertise in working on FinFet layouts in lower nodes, particularly TSMCN 7nm and below, is highly desirable. Proficiency in utilizing the latest features of Cadence VXL and Calibre DRC/LVS is expected. Basic knowledge of IO/ESD designs and familiarity with Basic SKILL/PERL will be beneficial for this role. The successful candidate should be capable of working both independently and collaboratively with a team, including contract workforces, to ensure timely completion of tasks. Effective communication skills are essential for working with global engineering teams. Qualcomm is an equal opportunity employer and is committed to providing accommodations for individuals with disabilities during the application and hiring process. If you have the required qualifications and are interested in this position, please contact Qualcomm Careers for more information.,

Posted 2 weeks ago

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2.0 - 6.0 years

0 Lacs

karnataka

On-site

You will be responsible for developing block, macro, or chip level layouts and floorplans according to project requirements, specifications, and design schematics. Your role will involve applying an understanding of design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs. You will conduct analyses, tests, and verify designs using different tools and techniques to identify and troubleshoot issues. It is essential to stay abreast of new verification methods and work collaboratively with multiple internal and external stakeholders to align on projects, provide updates, and resolve issues. To qualify for this position, you must have a Bachelor's degree in Electrical Engineering, Computer Science, Mathematics, Electronic Engineering, or a related field and a minimum of 2 years of experience designing custom layouts in a relevant domain. Alternatively, an Associate's degree in a related field with 4+ years of experience or a High School diploma with 6+ years of relevant experience will also be considered. Additionally, you should have at least 2 years of experience using layout design and verification tools such as cadence, LVS, and rmap. Qualcomm India Private Limited is a company of inventors seeking to revolutionize the CPU market. As an SRAM Mask Layout Designer, you will have the opportunity to work with a highly talented team to create designs that push the envelope on performance, energy efficiency, and scalability. The role involves developing block or macro level layouts and floorplans for high-performance custom memories based on project requirements and design schematics. Preferred qualifications for this role include a good understanding of device parasitics and reliability considerations during layout, knowledge of leading-edge processes, experience in layout design of library cells and memories in deep sub-micron technologies, and proficiency in industry-standard custom design tools and flows. Good communication skills are essential to work effectively with different teams and accurately describe issues. Key responsibilities include designing layout for custom memories and digital circuits, reading and interpreting design rule manuals, owning the entire layout process from floorplanning to physical verification, and providing insight into strategic decisions regarding memory layout. You should be able to work independently, execute memory layout with minimal supervision, and provide realistic schedules for layout completion. Qualcomm is an equal opportunity employer committed to providing accessible processes for individuals with disabilities. If you require accommodations during the application/hiring process, you can reach out to disability-accommodations@qualcomm.com. It is important to abide by all applicable policies and procedures, including security and confidentiality requirements.,

Posted 2 weeks ago

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2.0 - 6.0 years

0 Lacs

karnataka

On-site

Qualcomm India Private Limited is seeking a Layout Engineer to develop block, macro, or chip level layouts and floorplans according to project requirements, specifications, and design schematics. In this role, you will utilize your understanding of design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs. You will conduct analyses, tests, and verify designs using various tools and techniques to identify and troubleshoot issues, while staying updated on new verification methods. Collaborating with multiple internal and external stakeholders, you will align on projects, provide updates, and resolve issues. The ideal candidate should have a Bachelor's degree in Electrical Engineering, Computer Science, Mathematics, Electronic Engineering, or a related field with 2+ years of experience in designing custom layouts in relevant domains such as analog, mixed signal, RF, or digital design. Alternatively, an Associate's degree with 4+ years of experience or a High School diploma with 6+ years of experience in custom layout design is also acceptable. Additionally, a minimum of 2 years of experience using layout design and verification tools such as Cadence, LVS, rmap is required. Qualcomm is a company focused on innovation in the CPU market and is looking for a skilled SRAM Mask Layout Designer to join their high-performance CPU team. As an SRAM Mask Layout Designer, you will be responsible for developing block or macro level layouts and floorplans for high-performance custom memories based on project requirements and design schematics. The minimum qualifications for this role include 5+ years of experience with a high school diploma or equivalent, or 5+ years of experience with a BS in Electrical Engineering, or 3+ years of experience with an MS in Electrical Engineering. Direct experience with custom SRAM layout, familiarity with industry-standard custom design tools and flows, knowledge of leading-edge FinFET and/or nanosheet processes, and experience in layout design of library cells, datapaths, and memories in deep sub-micron technologies are preferred qualifications. Key responsibilities of the SRAM Mask Layout Designer include designing layouts for custom memories and digital circuits, interpreting design rule manuals for optimal layout creation, owning the entire layout process from floorplanning to physical verification, using industry-standard verification tools, providing layout fixes as needed, and collaborating with different teams to accurately describe issues and ensure completion. Applicants interested in this position at Qualcomm are encouraged to apply, as Qualcomm is an equal opportunity employer committed to providing accessible processes for individuals with disabilities. For more information about this role, interested individuals can contact Qualcomm Careers directly.,

Posted 1 month ago

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2.0 - 6.0 years

0 Lacs

karnataka

On-site

You will be responsible for developing block, macro, or chip level layouts and floorplans according to project requirements, specifications, and design schematics. Your role will involve applying your understanding of design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs. You will conduct analyses, tests, and verify designs using various tools and techniques to identify and troubleshoot issues, while keeping updated on new verification methods. Collaborating with multiple internal and external stakeholders will be essential to align on projects, provide updates, and resolve any issues that may arise. Minimum Qualifications: - Bachelor's degree in Electrical Engineering, Computer Science, Mathematics, Electronic Engineering, or related field with 2+ years of experience in designing custom layouts in a relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience. - OR Associate's degree in Computer Science, Mathematics, Electrical Engineering, or related field with 4+ years of experience in designing custom layouts in a relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience. - OR High School diploma or equivalent with 6+ years of experience in designing custom layouts in a relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience. - 2+ years of experience using layout design and verification tools (e.g., Cadence, LVS, RMAP). You should have solid experience of 3 to 6 years in developing high-speed IO/ESD/Analog layout design, along with expertise in working on FinFet layouts in lower nodes, with a preference for TSMCN 7nm and below. Proficiency in utilizing the best and latest features of Cadence VXL and Calibre DRC/LVS is required. A basic understanding of IO/ESD designs and knowledge of Basic SKILL/PERL will be beneficial. You should be capable of working independently and as part of a team, including coordinating work with contract workforces. Effective communication and collaboration skills with global engineering teams are essential for this role. Qualcomm is an equal opportunity employer and is committed to providing accessible processes for individuals with disabilities throughout the application and hiring process. Should you require an accommodation, please contact disability-accommodations@qualcomm.com or Qualcomm's toll-free number. Qualcomm expects all employees to adhere to applicable policies and procedures, including those related to security and protecting the company's confidential information. Please note that our Careers Site is intended for individuals seeking jobs at Qualcomm. Staffing and recruiting agencies are not authorized to use this site to submit profiles, applications, or resumes. Unsolicited submissions from agencies will not be accepted. For further information about this role, please reach out to Qualcomm Careers directly.,

Posted 1 month ago

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