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Standard Cell Layout Design, Sr Engineer Digicomm Semiconductor

6.0 - 10.0 years

0 Lacs

karnataka

On-site

As a Standard Cell Layout Design Senior Engineer at Digicomm Semiconductor Private Limited, you will be responsible for the following: - Minimum 6+ years of relevant circuit design experience in Standard Cell Layout Design. - Extensive experience in identifying, designing, and verifying cells to enhance core and SoC-level Performance, Power, and Area (PPA). - Strong understanding of MOSFET electrical behavior, transistor-level device physics, and PPA trade-offs, focusing on variability and layout challenges at advanced nodes like tsmc 3nm, Samsung 4nm, and below. - Expertise in transistor-level design of static circuits, including state-retaining elements such as latches and flip-flops. - Pr...

Posted 1 month ago

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