3.0 - 8.0 years

0 Lacs

karnataka

On-site

You will be responsible for design and RTL coding using Verilog and/or VHDL, design verification, FPGA synthesis, place & route, timing verification, programming, lab-based analysis, and debug on hardware platforms. Additionally, you may be involved in FPGA prototyping, which may require partitioning the core on two or more FPGAs. Key Responsibilities: - Design and RTL coding using Verilog and/or VHDL - Design verification - FPGA synthesis, place & route, timing verification, programming - Lab-based analysis and debug on hardware platforms - FPGA prototyping which may require partitioning the core on two or more FPGAs Qualifications Required: - 3-8 years of experience in FPGA design & develo...

Posted 3 weeks ago

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Senior/Lead FPGA Engineers intsemi

3.0 - 8.0 years

0 Lacs

karnataka

On-site

You will be responsible for designing and RTL Coding using Verilog and/or VHDL, Design Verification, FPGA Synthesis, Place & Route, timing verification, Programming. You will also conduct lab-based analysis and debug on Hardware platforms, and FPGA prototyping which may require partitioning the core on two or more FPGAs. To qualify for this role, you should have 3-8 years of experience in FPGA Design & Development, and hold a BE/BTECH/ME/MTECH in EC/EE/CS or related field. Proficiency in VHDL and/or Verilog programming languages is required, along with exposure to industry standard FPGA design tools. Experience in multi-FPGA design partitioning is preferred, and domain expertise in Wimax/LTE...

Posted 3 months ago

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