46 Isa Jobs

India Market UnitSenior Manager- Industry XWork Location:Delhi, Mumbai, Bangalore| Years of experience:12+ years | Entity:India Business |Level:Senior ManagerAccenture Industry XIndustry X combines Accentures powerful digital and AI capabilities with deep engineering,manufacturing, and infrastructure & capital projects expertise. Working across multiple industries, weoffer the broadest suite of services for digitizing R&D, engineering, construction, factory floors, andplant operations; speeding up the transformation of hardware into software-enabled products;reinventing infrastructure & capital projects processes and resulting infrastructure; driving operationalsafety, sustainability and productivity at scale.Using data and technologies such as AR/VR, cloud, AI, 5G, robotics and digital twins, we work withmarket leaders to build resilient and agile businesses that adapt their engineering, infrastructure &capital projects, manufacturing operations in the face of change.Key responsibilitiesDrive client value creation through participating in Industry X related project (DigitalTransformation) deliveries as well as support in end-to-end sales lifecycle (deal origination tosales) Conduct in-depth assessments of client manufacturing/production operations to identify areasripe for Industry X interventions Strong understanding of digital/AI use-cases and impact in manufacturing/productionoperations Analyze client needs and translate them into actionable roadmaps incorporating relevantIndustry X technologies such as IoT, Big Data, Cloud, AI, and Machine Learning. Develop and present compelling business cases highlighting the potential return on investment(ROI) associated with Industry X initiatives. Manage and lead client engagements, ensuring successful project execution within budget andtimelines. Partner with internal and external stakeholders, including technology vendors and systemintegrators, to deliver seamless project implementation. Stay abreast of the latest Industry X trends and technologies, continuously expanding yourknowledge base to provide clients with cutting-edge insights. Establish self as a trusted advisor with the client C-suite through an in-depth understanding ofthe client as well as industry Build networks at Accenture to be able to bring the best of Accenture to the clientQualification Required experienceMinimum 12+ years of experience in management consulting, with a strong track record in oneof the Resources industries such as:o Metalo Miningo Cemento Chemicals Proven experience in successfully leading and managing complex client engagements withinthese industries In-depth understanding of Industry X concepts, technologies (e.g., Industrial IoT, PredictiveMaintenance, Digital Twins), and their application in Production operations. Experience working with Manufacturing Execution Systems (MES), ISA 95 stack and otherrelevant industry-specific software is a plus.Educational qualifications Bachelor's degree in Engineering, Business Administration, or a related field, with a focus inindustrial engineering, manufacturing engineering, or a similar discipline.Whats in-store for youLearn and grow continuously:Build new skills, grow existing skills, develop new areas of expertisewithin functional, technical or industry areas of the business with Accentures unmatched 24/7expert-curated learning boards, webinars and classroom-style training programs Innovate:Get access to resources that will allow you to leverage the latest technologies and bringinnovation to life with the worlds most recognizable companies Thrive and advance:Grow your career as far as your ambitions take you. Truly human:Bring your whole self to a company that aims to be the most diverse in the worldand delivers real-time performance feedback based on your strengths, not stats

Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: CPU architecture team is driving the core math libraries needed for ML/AI acceleration. This position/s will expose you to Qualcomms cutting edge SoC and ML/AI platforms in the industry. Participate in Optimizing the core ML kernels using the latest advancements like SME, SVE of the ARM CPU architecture and enhance the performance of the ML models on the CPU of the QCOM Soc Required Skills== 3+ experince with Understanding of ARM CPU architecture fundamentals and ARM Arch64 ISA Optimizing kernels for vector Processors Understanding of the basic linear algebra functions used in AI/ML Algorithm design (logic, critical thinking) Performance Evaluation and Optimization of the applications for ARM architecture Inferencing of the ML models written in Pytorch/TensorFlow/Keras Understanding of the typical Open-Source Library framework design Preferred Skills=== Strong Programming skills and deep understanding of the ARM ISA understanding of the algorithms suitable for Vector and matrix accelerators Strong Analytical and debugging skills Good understanding of Optimizing the Linear Algebra algorithms Performance evaluation using QEMU, Simulators, Emulators and on Real Hardware Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field. 2+ years of academic or work experience with Programming Language such as C, C++, Java, Python, etc.

Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of core units (eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying frontend pipeline units of any CPU architecture. Hands on experience of Branch Prediction techniques. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic unit. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Lead the core level pre-silicon functional & performance verification for our next -generation IBM POWER processor core systems offering. Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment. Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU. Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 4 years or more experience in functional verification of processors, demonstrating a deep understanding of load store unit verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic units. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Lead the unit level pre-silicon functional & performance verification the Load Store Unit for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for LSU, including the Load and Store pipelines, D-Cache, Address translation, out of order execution of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of load store unit verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic units. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Lead the architecture, design and development of Processor Core Front end of pipeline units for high-performance IBM Systems. - Architect and design I-Cache, Instruction Fetch, Branch Prediction and Decode units of a high performance processor CPU - Develop the features, present the proposed architecture in the High level design discussions - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature. - Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in post silicon lab bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 8 or more years of demonstrated experience in architecting and designing specific CPU unit(eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) - Hands on experience of different Branch Prediction techniques - Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA - Experience with high frequency, instruction pipeline designs - At least 1 generation of Processor Core silicon bring up experience - In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) - Proficiency of RTL design with Verilog or VHDL - Knowledge of at least one object oriented or functional programming language and scripting language. - Nice to haves - Knowledge of instruction decode and handling pipeline hazards - Knowledge of verification principles and coverage - High-level knowledge of Linux operating system - Understanding of Agile development processes - Experience with DevOps design methodologies and tools Preferred technical and professional experience Master's Degree/PhD

Lead the unit level pre-silicon functional & performance verification the Load Store Unit for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for LSU, including the Load and Store pipelines, D-Cache, Address translation, out of order execution of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of load store unit verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic units. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

- Design & specify instrumentation systems for Oil & gas facility including pressure, temperature, flow & level measurement devices - Develop & review P&IDs & control philosophies -Coordinate with DCS/PLC/SCADA systems integration teams. Required Candidate profile -B.E./B.Tech in Instrumentation Engg/Electronics -Proficiency in AutoCAD, SPI (Intools) -Experience in EPC/EPCM oil & gas, Petro-Chemical, Process projects -5 yrs + experience required

Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of core units (eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying frontend pipeline units of any CPU architecture. Hands on experience of Branch Prediction techniques. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic unit. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Experience 3-6 years Work location: Bangalore Experience in PLC / HMI software development in Discrete Manufacturing domain preferably in Assembly line and packaging machines Expertise in IEC1131-3 PLC programming languages - SFC, FBD, Ladder logic, Structured Text Reading and understanding of customer documents like E-Plan, CTS, 3D Models and wiring drawings Development experience in atleast two of the PLC programming tools like TwinCAT, CODESYS, Simatic STEP 7, RSLogix, IndraWorks Knowledge of Industrial Automation protocols like OPC-DA / UA, Modbus, Profibus Experience in interfacing with external devices like Servo Drives, Motion Controllers, Screwers Hands-on experience in any HMI building tools like Factory Talk View, InTouch, WinCC Experience in commissioning and trouble shooting of Industrial Automation System Good to Have skills: Knowledge of Industrial Automation standards like ISA95, GAMP Any programming language knowledge like .Net C# or Java Experience in implementing any Manufacturing Execution System (MES) UAT (User acceptance Testing) and plant rollouts Roles and Responsibilities PLC programming

Introduction As a CPU Processor Verification Engineer , youll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable customers to make better decisions quicker on the most trusted hardware platform in todays market. Your role and responsibilities Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelors Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of core units (eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying frontend pipeline units of any CPU architecture. Hands on experience of Branch Prediction techniques. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic unit. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Introduction As a CPU Processor Verification Engineer , youll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable customers to make better decisions quicker on the most trusted hardware platform in todays market. Your role and responsibilities Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelors Degree Preferred education Masters Degree Required technical and professional expertise 4 years or more experience in functional verification of processors, demonstrating a deep understanding of core units (eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying frontend pipeline units of any CPU architecture. Hands on experience of Branch Prediction techniques. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic unit. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Introduction As a CPU Processor Verification Engineer , youll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable customers to make better decisions quicker on the most trusted hardware platform in todays market. Your role and responsibilities Lead the unit level pre-silicon functional & performance verification the Instruction Sequencing Unit for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for ISU which covers the Issue queues, Register Renaming for Out of Order Execution, Issue instructions to Execution Pipelines, Reordering Buffers for completion of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelors Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of Instruction Dispatch verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing Issue Queues, Register renaming and forwarding, Reordering Buffer and Pipeline flush/exception handling etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic units. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Lead the core level pre-silicon functional & performance verification for our next -generation IBM POWER processor core systems offering. Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment. Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU. Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of load store unit verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic units. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Lead the unit level pre-silicon functional & performance verification the Instruction Sequencing Unit for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for ISU which covers the Issue queues, Register Renaming for Out of Order Execution, Issue instructions to Execution Pipelines, Reordering Buffers for completion of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of Instruction Dispatch verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing Issue Queues, Register renaming and forwarding, Reordering Buffer and Pipeline flush/exception handling etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic units. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

At ABB, we are dedicated to addressing global challenges Our core values: care, courage, curiosity, and collaboration combined with a focus on diversity, inclusion, and equal opportunities are key drivers in our aim to empower everyone to create sustainable solutions Write the next chapter of your ABB story, This position reports to Senior Engineering Manager Your role and responsibilities In this role, you will have the opportunity to act as a design authority for an engineering discipline with low to medium complexity Each day, you will complete assignments on small projects or portions of larger projects in a cost-effective manner You will also showcase your expertise by applying basic design thinking/design for excellence concepts in projects The work model for the role is: This role is contributing to the Process Automation business for Energy Industries division based in Bangalore, India You will be mainly accountable for: Strong expertise in automation within Pharma, Biotech/API, and Food & Beverage industries, In-depth knowledge of Batch standards (S-88) and Good Manufacturing Practices (GMP) for Batch Engineering, Proficient in Batch Process Application Engineering and Implementation based on User Requirement Specifications (URS), Extensive experience in Batch software engineering, including the development of SFCs (Sequential Function Charts) and Recipes, Skilled in HMI (Human-Machine Interface) Design and Implementation, Proficient in conducting Integrated System Testing (Factory Acceptance Testing FAT), Expertise in Startup, Commissioning, and Troubleshooting activities You will join a talented team, where you will be able to thrive, Qualifications For The Role Industry Expertise: Experience in ISA 88 Batch Standards, Batch Engineering, and developing Recipe Management and Procedures for Batch Production processes, Software & Systems: 3-5 years of experience with ABB DCS, Delta V, Rockwell, or Siemens Batch systems preferred, Project Execution: Proficiency in Pharma projects aligned with V-model and GAMP standards, including requirements documentation, detailed design, integration, testing, and on-site startup, Validation & Documentation: Knowledge of Computer Systems Validation, risk-based approaches, and developing specifications (URS, FDS, SDS) in the Pharma domain, Engineering Skills: Expertise in process control and automation using P&IDs and field instrumentation based on ISA S88 standards, Educational Qualifications: BE/BTech/Diploma in Engineering (Control and Instrumentation) or equivalent, Travel Flexibility: Willingness to travel internationally as needed (over 50% travel anticipated), More about us ABB Energy Industries is enabling safe, smart and sustainable projects and operations for businesses across the oil, gas, chemicals, life sciences, power generation and water sectors Driving integrated solutions that automate, digitalize and electrify industry we connect our people and technology to help our customers adapt and succeed With over 50 years domain expertise, we continue to innovate and reshape traditional approaches across the energy sector with our technologies designed to improve operational efficiency, reduce risk, reduce energy consumption and waste We value people from different backgrounds Apply today for your next career step within ABB and visit abb,com to learn about the impact of our solutions across the globe #MyABBStory It has come to our attention that the name of ABB is being used for asking candidates to make payments for job opportunities (interviews, offers) Please be advised that ABB makes no such requests All our open positions are made available on our career portal for all fitting the criteria to apply ABB does not charge any fee whatsoever for recruitment process Please do not make payments to any individuals / entities in connection to recruitment with ABB, even if is claimed that the money is refundable ABB is not liable for such transactions For current open positions you can visit our career website https://global abb/group/en/careers and apply Please refer to detailed recruitment fraud caution notice using the link https://global abb / group / en / careers / how-to-apply / fraud-warning

Hi all, We are hiring for the role OT Security Specialist Location: Bangalore Experience: 7-9 years Industry: Automotive Job Description: We are seeking a highly skilled OT Security Expert with 7-9 years of experience to join our team in the automotive industry. The ideal candidate will have hands-on experience in OT security, proficiency with the OT vulnerability management tools, and the ability to draft process documents. This role requires a deep understanding of operational technology security and its application within the automotive sector. Key Responsibilities: • Drive OT security strategies-initiative globally. • Develop and implement OT security strategies and policies to protect automotive manufacturing systems and networks. • Conduct risk assessments and vulnerability analyses to identify and mitigate security threats. • Utilize the Otorio tool to monitor, detect, and respond to security incidents within OT environments. • Draft and maintain comprehensive process documents, including security protocols, incident response plans, and compliance reports. • Collaborate with cross-functional teams to ensure the integration of security measures into automotive production processes. • Provide training and guidance to staff on OT security best practices and procedures. • Stay updated with the latest industry trends, threats, and technologies in OT security. • Design and implement network segmentation and access control measures to safeguard OT systems. • Perform regular security audits and assessments to ensure compliance with industry standards and regulations. • Develop and execute incident response plans to effectively address and recover from security breaches. • Work closely with IT and engineering teams to ensure seamless integration of OT security measures with existing infrastructure. • Conduct forensic analysis and root cause investigations of security incidents to prevent future occurrences. • Participate in the development and testing of disaster recovery and business continuity plans. Qualifications: • Bachelor's degree in Computer Science, Information Technology, Cybersecurity, or a related field. • 7-9 years of experience in OT security, preferably within the automotive industry. • Hands-on experience with the Otorio tool and other OT security technologies. • Strong understanding of OT systems, networks, and protocols. • Experience in drafting and maintaining process documents and security protocols. • Relevant certifications such as GICSP, ISA 62443 related are highly desirable. If you are interested drop your resume at mojesh.p@acesoftlabs.com call: 9701971793

Job Summary We are seeking a highly motivated and experienced IT-OT Engineer to join our ENGIE India team. The ideal candidate will possess a strong technical IT-OT background and be prepared for extensive site travels to support onsite issues during the implementation, commissioning, and post-commissioning operations of solar and wind power plants, while base location will be Pune, India. Main Objectives The IT-OT Engineer for Renewable Sites will play a pivotal role in bridging the gap between Information Technology (IT) and Operational Technology (OT) to enhance the efficiency, reliability, and security of renewable energy plant operations. This position involves designing, implementing, and maintaining integrated systems that support the seamless operation of renewable energy sites, including wind, solar power plants. The engineer will ensure robust data communication, real-time monitoring, and control systems, while adhering to industry standards and best practices. The ideal candidate will possess expertise in Supervisory Control and Data Acquisition (SCADA) systems, IT-OT integration, and strong networking skills . Additionally, strong technical background, excellent problem-solving abilities, and a commitment to advancing sustainable energy solutions are essential. Key Responsibilities: System Monitoring and Maintenance: Oversee and optimize the technical IT-OT operations of renewable energy production infrastructures (solar, wind, etc.), ensuring efficient operations. Monitor and manage the troubleshooting of any IT-OT issues happening on the solar and wind farms with central support and/or subcontractors. SCADA Systems Management: Ensure the proper follow-up on the maintenance plan for SCADA systems, including troubleshooting and managing issues related to cabling, optic fibre. Handle level 1 troubleshooting of the SCADA system and manage the troubleshooting of any OT issues at solar and wind sites. Cybersecurity Management: Work with management and CISO to implement cybersecurity and support IT/OT risk management Coordinate with the O&M department to ensure IT/OT systems properly support emergency response procedures. Coordinate with O&M for the procurement and inventory of spare parts for IT and SCADA systems. IT System Management: Provide level 1 proximity support on all IT-related issues, including user support for workstations, applications, networking and IT consumables. Manage the network configuration (switching, routing) and ensure the proper follow-up on the maintenance plan for industrial telecom systems. Responsible for the obsolescence follow-up process (including management and patching). Ensure the compliance of IT/OT-related contractors working on-site with ENGIE guidelines. Report any IT-OT related abnormalities, incidents, or process deviations spotted while monitoring the systems. Ensure that all IT/OT equipment (servers, control systems, SCADA, communication devices, etc.) complies with ENGIE and regulatory standards. Regularly interact with the O&M department to align IT/OT systems with broader ENGIE protocols and stay updated on the latest regulations. Provide hands-on management of Network devices and systems Manage support activities of external providers for the delivery of network services and project tasks Manage network systems to ensure compliance is maintained with cybersecurity policies Provide input into the risk management programme ensuring that Information Technology systems Disaster Recovery plans - include network services and other network elements. In the event of a cybersecurity incident perform tasks as directed by CISO Coordinate with technology and business groups to assess, implement, and monitor IT-related security risks/hazards Report security performance against established security metrics Technical Knowledge and Skills: Strong knowledge of Industrial Control Systems (ICS) including PLC, DCS, SCADA, HMI, and IPC, PPC. Familiarity with automation hardware and software, Windows Server and client architecture, and IT hardware for power plants. Understanding of OT networking, OT network components, communication protocols such as Modbus, OPC/UA, TCP/IP, Profinet, and OT serve r and storage components. Technical hands-on experience in networking , routing , switching. Experience in implementing cybersecurity tools for OT environments. Knowledge of industry standards like ISA/IEC 62443. Qualifications and Experience: Diploma/Degree in Computer Science, Industrial Engineering, Electrical Engineering, Mechanical Engineering, or equivalent hands-on experience managing a complex IT and/or OT system. 5-8 years of experience in IT/OT systems, preferably in the renewable energy sector. Strong knowledge of SCADA architecture is mandatory. Experience with SCADA systems, cybersecurity, and IT support. Willingness to travel extensively to various sites for onsite support . Strong problem-solving skills and the ability to work independently. Flexible mindset, able to work outside the comfort zone. Certifications CCNA, CompTIA Network+, Certified Automation Professional ( Desirable not mandatory) Preferably from Gujarat or Rajasthan native Behavioural Competencies Customer-focused with a commitment to delivering high-quality service. Ability to work independently, exercise sound judgment, and make decisions in a fast-paced environment. Adaptable to changing priorities and flexible to work outside regular hours when required to meet timelines. Work Environment & Physical Requirements Extensive travel to ENGIE projects sites across India region for technical issues, field visits, IT-OT implementation. Base location is Pune, India. Requires extended periods of concentration, technical hands-on work, and the ability to operate office equipment. Walking, bending, or physical activity may be required during site visits. Location and Reporting: Location: Pune , India ( extensive travel across the region to support sites . Stay at sites location during implementation, support till issues resolved) Reports to: Cyber Security & IT Infrastructure Manager

Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 4 years or more experience in functional verification of processors, demonstrating a deep understanding of core units (eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying frontend pipeline units of any CPU architecture. Hands on experience of Branch Prediction techniques. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic unit. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of core units (eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying frontend pipeline units of any CPU architecture. Hands on experience of Branch Prediction techniques. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic unit. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Lead the core level pre-silicon functional & performance verification for our next -generation IBM POWER processor core systems offering. Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment. Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU. Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of complete processor pipeline stages. Good understanding of computer architecture, including Processor core design specifications,processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units Experience with high frequency, instruction pipeline designs. At least 1 generation of Processor Core silicon bring up experience. In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of verification principles and coverage. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 6 years or more experience in functional verification of processors, demonstrating a deep understanding of core units (eg.I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying frontend pipeline units of any CPU architecture. Hands on experience of Branch Prediction techniques. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages.

Lead the unit level pre-silicon functional & performance verification the Instruction Sequencing Unit for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for ISU which covers the Issue queues, Register Renaming for Out of Order Execution, Issue instructions to Execution Pipelines, Reordering Buffers for completion of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead, guide, mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress, potential challenges encountered and milestones achieved to stake holders and team members Required education Bachelor's Degree Preferred education Bachelor's Degree Required technical and professional expertise 15 years or more experience in functional verification of processors, demonstrating a deep understanding of Instruction Dispatch verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing Issue Queues, Register renaming and forwarding, Reordering Buffer and Pipeline flush/exception handling etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Hiring manager and Recruiter should collaborate to create the relevant verbiage.

Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of core units (eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying frontend pipeline units of any CPU architecture. Hands on experience of Branch Prediction techniques. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic unit. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Lead the core level pre-silicon functional & performance verification for our next -generation IBM POWER processor core systems offering. Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment. Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU. Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of complete processor pipeline stages. Good understanding of computer architecture, including Processor core design specifications,processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units Experience with high frequency, instruction pipeline designs. At least 1 generation of Processor Core silicon bring up experience. In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of verification principles and coverage. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.