2.0 - 7.0 years

5 - 12 Lacs

Hyderabad, Bengaluru

Work from Office

Role & responsibilities JD: Advanced memory layout design (SRAM, ROM, custom) Hands-on with FinFET, Virtuoso, Calibre, PVS Tight collaboration with circuit & verification teams Mastery in DRC/LVS, parasitic optimization, and layout efficiency Experience with foundry tech files and tapeout is a huge plus!

Posted 3 months ago

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Analog Layout Lead Eximietas Design

7.0 - 15.0 years

0 Lacs

hyderabad, telangana

On-site

You are invited to join Eximietas Design as a Senior Analog Layout Design Engineer/Lead with 7-15 years of experience. We are a rapidly growing team seeking professionals skilled in lower FINFET technology nodes, particularly TSMC 5nm. Your role will involve working on cutting-edge analog layout design projects. Your key responsibilities will include expertise in IR drop, Electromigration, self-heating, RC delay, and parasitic capacitance optimization. A solid understanding of how layout impacts circuit performance, such as speed and area, is essential. You must be able to implement layouts that meet strict design constraints while ensuring high quality. Proficiency in CADENCE/SYNOPSYS layou...

Posted 3 months ago

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EM and IR Drop Analysis Team Computers

4.0 - 8.0 years

20 - 30 Lacs

bengaluru

Work from Office

Perform EM and IR drop analysis during physical implementation and sign-off stages using industry-standard EDA tools (e.g., RedHawk, Voltus,). Collaborate with physical design, timing, and power teams to identify and resolve power integrity issues . Optimize power grid and signal routing for improved EM/IR performance. Interpret analysis results, propose corrective actions, and validate fixes. Develop and maintain EMIR analysis methodologies and best practices. Support floorplanning, placement, and routing teams with EMIR-related design guidelines.

Posted Date not available

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Staff / Senior Staff Engineer- PDN (IR Drop & EM analysis) & PV Randstad

5.0 - 10.0 years

12 - 19 Lacs

noida

Hybrid

We are seeking a highly skilled and experienced PDN (IR Drop & EM analysis) & PV (Physical Verification) expert to join our Flows & Methodologies Team . This role requires strong analytical skills, attention to detail, and collaboration with cross-functional teams. Proficiency in EDA tools and a solid understanding of digital design principles are essential for success. Location: Noida (Hybrid work mode) Experience: 5 to 15 years Key Responsibilities & Skills: Work closely with SoC cross-functional teams to develop and define PDN & PV flow and methodologies for low geometry nodes (3nm, 5nm, 16nm). Hands-on experience in PDN (IR Drop & EM Analysis) and PV (Physical Verification) domains. Expe...

Posted Date not available

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Power Integrity / Power IR Engineer Team Computers

5.0 - 7.0 years

20 - 25 Lacs

bengaluru

Work from Office

Understanding of power delivery networks (PDN) and power integrity concepts Analysing and IR drop, across the power grid on multi Power domain / Voltage Area EM Analysis and current density check Power rail / PDN analysis, rail current and checks Developing and implementing techniques to reduce power consumption, such as power gating and voltage islands Perl, Python, TCL : For automation of tasks and analysis Understanding of EM and ESD (Electrostatic Discharge) requirements

Posted Date not available

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