333 Ips Jobs - Page 5

Support Engineer (SE) - Chennai, India - Exasol This website uses cookies to ensure you get the best experience. Exasol and our selected partners use cookies and similar technologies (together cookies ) that are necessary to present this website, and to ensure you get the best experience of it. If you consent to it, we will also use cookies for analytics purposes. You can withdraw and manage your consent at any time, by clicking Manage cookies at the bottom of each website page. Decline all non-necessary cookies Select which cookies you accept On this site, we always set cookies that are strictly necessary, meaning they are necessary for the site to function properly. If you consent to it, we will also set other types of cookies. You can provide or withdraw your consent to the different types of cookies using the toggles below. You can change or withdraw your consent at any time, by clicking the link Manage Cookies , that is always available at the bottom of the site. These cookies are necessary to make the site work properly, and are always set when you visit the site. These cookies collect information to help us understand how the site is being used. Decline all non-necessary cookies Integrated Professional Services (IPS) Support Engineer (SE) - Chennai, India Apply for this position Exasol accelerates insights from the world s data. Our in-memory technology, massively parallel processing (MPP) technology is specifically designed for analytics, enabling businesses to turn data into actionable insights. At Exasol, we are committed to pushing the boundaries of what is possible in data analytics, and we are looking for passionate individuals to join our team and help share the future of data technology. Join our diverse, remote-first team where more than 30+ languages (and counting!) are spoken, and every voice is valued. We are looking for passionate individuals who thrive on collaboration, innovation, and a shared commitment to help share the future of data technology. The primary responsibility of the Support Engineer is handling the 1st Level ticket queue, providing advice to our customers, and maintaining the support knowledge base. Key Responsibilities: Provide professional advice to clients via our ticketing system Work close with 2nd Level Support, follow-up and trace fixes and solutions Review and update knowledge base articles Contribute to continuous improvement activities Participate in trainings incl. self-learning and on the job trainings Required Qualifications: University degree in IT or equivalent Alternative: technical degree (Technician....) Advanced level or analytical troubleshooting approach Experience in multi-cultural environments Working with ticketing and knowledge systems Cloud technology (AWS, Azure, GCP) Shell and scripting knowledge Database and SQL knowledge, SQL scripting Friendly and polite in communication Good interpersonal skills Team player but also able to work on own initiative Enthusiastic, self-starter and highly self-motivated English: mandatory (Level B1) How We Work at Exasol: Own Your Impact: At Exasol, you are not just a cog in the machine; you will step into immediate ownership of projects, driving them forward with a refreshing level of autonomy. Thrive in a Global Team: Join a vibrant, international community where diversity is celebrated, collaboration is key, and feedback fuels growth. Learn, Grow, Lead : We are invested in your development! Continuous knowledge-sharing, "Coffee and Learn" sessions, exciting events, and dedicated leadership programs empower you to soar. Work on Your Terms : Flexibility is the name of the game! Enjoy adaptable hours, remote options, and "workcations" for the ultimate work-life balance. Growth That Goes Beyond the Office : Dive into a comprehensive onboarding experience, fun team events, and a deep commitment to diversity and sustainability. We care about your holistic well-being. Rewards that Matter : Monthly home office allowance, volunteering options, floating days, and secure pension plans (location-dependent) prove we value your contributions. Exasol is a proud, equal opportunities employer. We are committed to a diverse and inclusive working environment and therefore base all our employment selection decisions, within all aspects of our business, on experience, skill, and integrity. We strongly encourage applicants from all walks to life to apply for our positions, irrespective of age, sex, gender identity, disability, sexual orientation, race, religion, etc. Integrated Professional Services (IPS) About Exasol Exasol is the world s fastest analytics database, trusted by the world s most ambitious organizations. Built for speed and flexibility, it can analyze billions of rows in seconds and run high-performance analytics securely whether in the cloud or on-premises. Need to scale your analytics functionSimple pricing makes it easy. Want to deliver frictionless insightsAutomatic self-indexing tunes performance for optimal results. And you don t have to wait - Exasol fits into any data environment, so you can get started right away. Founded in 2000 Coworkers 200 Apply for this position Already working at Exasol Let s recruit together and find your next colleague.

System Engineer - Chennai, India - Exasol This website uses cookies to ensure you get the best experience. Exasol and our selected partners use cookies and similar technologies (together cookies ) that are necessary to present this website, and to ensure you get the best experience of it. If you consent to it, we will also use cookies for analytics purposes. You can withdraw and manage your consent at any time, by clicking Manage cookies at the bottom of each website page. Decline all non-necessary cookies Select which cookies you accept On this site, we always set cookies that are strictly necessary, meaning they are necessary for the site to function properly. If you consent to it, we will also set other types of cookies. You can provide or withdraw your consent to the different types of cookies using the toggles below. You can change or withdraw your consent at any time, by clicking the link Manage Cookies , that is always available at the bottom of the site. These cookies are necessary to make the site work properly, and are always set when you visit the site. These cookies collect information to help us understand how the site is being used. Decline all non-necessary cookies Integrated Professional Services (IPS) System Engineer - Chennai, India Apply for this position Exasol accelerates insights from the world s data. Our in-memory technology, massively parallel processing (MPP) technology is specifically designed for analytics, enabling businesses to turn data into actionable insights. At Exasol, we are committed to pushing the boundaries of what is possible in data analytics, and we are looking for passionate individuals to join our team and help share the future of data technology. Join our diverse, remote-first team where more than 30+ languages (and counting!) are spoken, and every voice is valued. We are looking for passionate individuals who thrive on collaboration, innovation, and a shared commitment to help share the future of data technology. The System Engineer is responsible for delivering on consulting engagements and for performing Level 2 (L2) support in topics such as deployments, infrastructure, and custom solutions. Additionally, the system consultant is responsible for the creation and maintenance of Knowledge base articles for customers and Level 1 (L1) Support. Therefore, the system consultant must be a strong communicator (verbal and written) with a proven track record of technical problem solving. Key Responsibilities: Execute service (L2 support and consulting) activities in a way to ensure that project outputs are being delivered as per the schedule and to the required quality Provide professional advice to clients via our ticketing system Work closely with R&D, Project Management, follow-up and trace bug fixes and patches Identify gaps in existing documentation and knowledge and prepare documentation to fill those gaps Participate in trainings incl. self-learning, computer based and on the job trainings in order to stay up to date on the latest trends Carry out on-site visits to follow up on the project progress as needed Ensure that all quality management related tasks are carried out accurately and in a timely manner Prepare work statements and proposals for work Required Qualifications: University degree in IT or equivalent Alternative: technical degree (Technician....) + 3 years experience Able to follow a Customer-centric solution approach Advanced level or analytical troubleshooting approach Experience in multi-cultural environments Experience in liaising with stakeholders from internal/external through different hierarchic levels (staff new to the product, advanced technical staff, managers) ISO/OSI model, TCP/IP protocols Storage and Server Systems (HP Blade, FSC, NetApp, LUN) Shell and scripting knowledge Database and SQL knowledge, SQL scripting Good interpersonal skills Secure and und customer orientated appearance, highly self-motivated and self-dependent Excellent organizational skills Team player but able to work on own initiative Flexible Good written and oral communication skills Enthusiastic, self-starter and highly self-motivated Appreciation of cultural differences How We Work at Exasol: Own Your Impact: At Exasol, you are not just a cog in the machine; you will step into immediate ownership of projects, driving them forward with a refreshing level of autonomy. Thrive in a Global Team: Join a vibrant, international community where diversity is celebrated, collaboration is key, and feedback fuels growth. Learn, Grow, Lead : We are invested in your development! Continuous knowledge-sharing, "Coffee and Learn" sessions, exciting events, and dedicated leadership programs empower you to soar. Work on Your Terms : Flexibility is the name of the game! Enjoy adaptable hours, remote options, and "workcations" for the ultimate work-life balance. Growth That Goes Beyond the Office : Dive into a comprehensive onboarding experience, fun team events, and a deep commitment to diversity and sustainability. We care about your holistic well-being. Rewards that Matter : Monthly home office allowance, volunteering options, floating days, and secure pension plans (location-dependent) prove we value your contributions. Exasol is a proud, equal opportunities employer. We are committed to a diverse and inclusive working environment and therefore base all our employment selection decisions, within all aspects of our business, on experience, skill, and integrity. We strongly encourage applicants from all walks to life to apply for our positions, irrespective of age, sex, gender identity, disability, sexual orientation, race, religion, etc. Integrated Professional Services (IPS) About Exasol Exasol is the world s fastest analytics database, trusted by the world s most ambitious organizations. Built for speed and flexibility, it can analyze billions of rows in seconds and run high-performance analytics securely whether in the cloud or on-premises. Need to scale your analytics function? Simple pricing makes it easy. Want to deliver frictionless insights? Automatic self-indexing tunes performance for optimal results. And you don t have to wait - Exasol fits into any data environment, so you can get started right away. Apply for this position Already working at Exasol ? Let s recruit together and find your next colleague.

We are looking for a highly skilled Technical Lead with strong expertise in Java or Python and a solid background in network and security software development. The ideal candidate will lead a team of engineers, drive end-to-end development, and work closely with cross-functional teams to deliver scalable and secure software solutions. Excellent communication skills and experience working with global clients are essential. Key Responsibilities: Lead the design, development, and deployment of network and security-related software solutions. Mentor and guide a team of developers and ensure code quality through reviews and best practices. Work with Java and/or Python to build scalable backend systems for security platforms. Collaborate with product managers, architects, and QA to translate requirements into technical solutions. Integrate with firewalls, proxies, threat detection, or SASE components in the software stack. Apply secure coding practices and ensure adherence to security standards and protocols. Drive performance tuning, scalability, and reliability improvements in the software architecture. Communicate effectively with internal teams and external stakeholders, including international clients. Manage project timelines, task breakdowns, and delivery schedules. Required Skills: 8 12 years of hands-on software development experience in Java and/or Python. Strong experience in networking protocols, network security, and security product development. Experience in developing or integrating with firewalls, IDS/IPS, VPNs, SASE, or threat detection systems. Solid understanding of REST APIs, microservices architecture, and secure coding standards. Excellent problem-solving, communication, and team leadership skills. Experience in Agile/Scrum methodologies and DevOps practices. Preferred Qualifications: US Visa (B1/B2, H1B, or L1) is preferred for potential client interactions. Familiarity with cloud platforms (AWS, Azure, GCP) and deployment pipelines. Bachelor s or Master s degree in Computer Science, Information Security, or related field. Security certifications (e.g., CISSP, CEH) or cloud certifications are a plus. Job Category: Technical Job Type: Full time Job Location: Noida Experience: 8-12 years Position : 1 Apply for this position Allowed Type(s): .pdf, .doc, .docx By using this form you agree with the storage and handling of your data by this website. *

We are looking for an experienced Service Delivery Manager (SDM) to lead and oversee service delivery operations for one of our prestigious clients in the network security domain. The SDM will be responsible for ensuring high-quality delivery of network security services, managing client relationships, leading cross-functional teams, and ensuring SLAs and KPIs are consistently met or exceeded. Key Responsibilities: Manage end-to-end service delivery operations for network security solutions across the client environment. Act as the primary point of contact for client interactions, ensuring high customer satisfaction. Lead incident, change, and problem management processes in alignment with ITIL standards. Collaborate with internal technical teams to ensure proactive monitoring, performance tuning, and capacity planning. Ensure delivery of services within agreed SLAs, KPIs, and contractual obligations. Drive continuous improvement initiatives for service quality and operational efficiency. Prepare and present regular reports on service performance, incidents, and improvement plans. Coordinate with project teams for onboarding new services or accounts. Lead and mentor a team of technical engineers or support personnel. Participate in governance meetings and ensure timely resolution of escalated issues. Required Skills & Experience: Minimum 12 years of experience in IT service delivery, with at least 5 years in network security domain. Strong understanding of networking concepts, firewalls, VPNs, IDS/IPS, and threat management tools. Proven experience in managing enterprise-level clients and delivering IT/network security services. Strong leadership, stakeholder management, and communication skills. ITIL Foundation Certification (preferred). Experience with leading tools and platforms like Palo Alto, Cisco, Fortinet, etc. Ability to manage multiple priorities in a dynamic environment. Qualifications: Bachelor s degree in Engineering, Information Technology, or a related field. Certifications such as ITIL, PMP, or network/security certifications (CCNA, CISM, CISSP) are an advantage. Job Category: Functional Job Type: Full time Job Location: Noida Experience: 12-18 years Position : 1 Apply for this position Allowed Type(s): .pdf, .doc, .docx By using this form you agree with the storage and handling of your data by this website. *

Roles Responsibilities : Bosch Software and Digital Solutions is a leading systems integrator and solution provider for technology led business transformation. It is the systems integration arm of Bosch Global and is headquartered in Bangalore. The Chief AI Officer (CAIO) will be responsible for developing and articulating a clear AI vision for SDS and overseeing, implementing and governing SDS AI strategy that aligns with business goals. The CAIO will also oversee the development of innovative AI and Gen AI solutions/offerings for further transforming SDS s offerings portfolio and to support SDS customers with their AI journeys. The CAIO will lead Bosch SDS s AI-first approach and align SDS portfolio offerings to the rapidly evolving needs of our customers. Key Responsibilities: 1. Strategic AI Vision and Roadmap Develops and articulate a clear AI vision that aligns with SDS s short, medium and long-term goals. Creates an AI roadmap that outlines short-term and long-term initiatives. Identifies vital areas where AI can drive business growth and efficiency. 2. AI Strategic Leadership Develop and drive SDS AI strategy to align with organizations broader transformation roadmap and business goals. Define overall AI GTM and growth strategy in conjunction with business leaders. 3. AI Product and Solution Development Analyze emerging trends to create AI products/accelerators, frameworks and capabilities in key areas such as predictive analytics, NLP, Computer vision, generative AI, agentic AI, and automation. Define guidelines for AI model development for customers, ensuring ethical, transparent, and responsible AI Use Conceptualize the blueprint of asset to-be developed and collaborate with technical team to execute and implement the same. Co-lead initiatives like hackathons, workshops, and other events to encourage innovation and cross sharing of ideas. 4. AI Strategy Consulting and Advisory Lead customer discussions to understand their existing problem statements and business challenges and assess their existing AI maturity. Define target AI Reference architecture, use case discovery, business case and implementation approach for AI initiatives. Define consulting approach and frameworks and develop AI Consulting proposals, bid defense, and help in acquisition. Manage/Lead AI consulting engagement to define AI strategy, roadmap, and execution plans aligned with business objectives. 5. AI Implementation Oversee the implementation of AI projects for customers, which includes Design and deployment of AI-powered solutions, including machine learning (ML), generative AI, computer vision, NLP, and generative AI solutions for customers. Identify emerging AI trends and technologies to create competitive, scalable offerings. Leverage the existing code base/solutions to ideate and create re-usable assets/IPs. 6. AI Team leadership and Talent Development Build and Lead cross-functional AI teams (Data Scientists, ML Engineers, AI researchers, Gen AI developers, Product Managers, etc. ) Foster a culture of continuous learning, innovation, and collaboration. Establish AI training and upskilling programs for employees.

Experience Summary: Lead Cyber Security and Management, shall be responsible for ensuring the day-to-day operations and maintenance of the organization's security Posture. Strengthen security posture and ensure the control effectiveness of security systems within an organization. Collaborate with diverse teams to ensure the seamless functioning of the Solutions, optimization of the security infrastructure and controls. Responsibilities: Ensure the day-to-day operations and maintenance of the organization's cyber security infrastructure and controls to protect systems, networks, and data. Troubleshooting of WAF, IPS, SSL Offloader, DAM, API Security etc. Sec DevOps, Review and implement Secure Configuration. Responsible for Firmware upgrade, closing of Audit points/Vulnerabilities, Creation of Security Policies, Fine tuning of exiting Policies, Configuration Backups, Event Log Monitoring, Signature finetuning etc. Provide resolution of issues escalated from L1 and L2. Handling Shift Operations across 24x7. Prepare HLD & LLD, generate configuration template etc for changes. Ensure coverage and effectiveness of Security Solution, Report and Review incidents. Ensure optimum security, availability, performance, and capacity of security solutions under management Ensure & maintain up-to-date documentation - SOPs, Architecture digrams etc. to remove dependency on people Manage configuration changes and deployments according to established change management processes, ensuring minimal disruption and adherence to best practices. Ensure hardening, latest stable version and security patches of security devices and solutions Track EOL/EOS and ensre that there no technology obsolescence. Ensure resolution of incidents and outages, coordinating with internal teams and external vendors to restore service within agreed-upon SLAs. Manage escalations and run the smooth operations of security solutions. Ensure relevant processes are followed for change, incident & daily operations Identify & analyse pain areas in existing security operations & implement improvements Manage operational issues which require design/technical inputs. Ensure compliance with regulatory requirements, security policies, and security frameworks such as ISO 27001, NIST, or CIS Publish the relevant dashboards and status updates. Escalate deviations and violations in a timely manner. Remain current with organizations security policies, latest security advisories/threats, industry best-practices and developments in cyber security, and recommend and implement best practices and technologies to mitigate emerging threats. Education: B.E/ B.Tech, MCA (Computer/IT)/B.Sc (Computer/IT) or degree in relevant field. Experience: Candidate should have 6+ years of experience preferably in Banking and Technology organization Knowledge: Sound experience in managing Application security technologies and operations in a large and complex environment. Should have sound understanding & knowledge of Sec DevOps, Microsegmentation, DDOS Protection Solution, DNS Sec, various Database and Application security technologies & techniques like WAF, NGFW, IPS, SSL Offloader, DAM, API Security etc. Should have hands on experience on WAF, IPS, SSL Offloader, DAM, API Security, incident response techniques and technologies. Should have knowledge & understanding of Cloud Technologies, IT infrastructure & networking technologies, operations and security principles. Should have sound understanding about OWASP Web and Mobile Application Security, Mitigation and Response. Strong understanding of Regulatory security guidelines & master directions and security frameworks such as ISO 27001, NIST, or CIS. Should be well versed with ITIL and ITSM practices

GRC Lead will manage and strengthen our Governance, Risk, and Compliance (GRC) initiatives for Managed Security Services (MSS) within the Telecom sector. The GRC Lead will be responsible for ensuring that the services we provide to our telecom clients adhere to industry standards, regulatory requirements, and robust risk management practices. This individual will play a key role in aligning our security services with client business objectives, improving our security posture, and ensuring compliance with telecom-specific regulations and frameworks. You have: 7+ years of experience in Governance, Risk, and Compliance (GRC), with at least 3 years in telecom or Managed Security Services (MSS) with a degree in Telecommunication Engineering, Computer Science, Information Security, or a related field (B.E/B.Tech/M.E/M.Tech/MCA). Expertise in telecom-specific security technologies: Firewalls, IDS/IPS, SIEM, encryption, access management, and incident response platforms. Experience working with security and compliance frameworks: ISO 27001, NIST CSF, PCI-DSS, GDPR, NIST SP 800-53, ETSI EN 303 645, also telecom infrastructure, including MPLS, 5G, IoT, and SDN/NFV. Familiarity with GRC tools such as RSA Archer, ServiceNow GRC, or MetricStream. Experience in telecom risk management processes, regulatory assessments, and vendor risk governance. It would be nice if you also had: Industry certifications such as CISM, CISA, CISSP, CRISC, ISO 27001 Lead Auditor/Implementer, TOGAF, or ITIL. Experience in stakeholder management, including executive communication, regulatory liaison, and conflict resolution with auditors or vendors. Strong analytical, negotiation, and project management skills in a cross-functional, multicultural telecom environment. Provide security governance leadership tailored to telecom networks, including mobile, 5G, SDN/NFV, and MPLS environments. Lead risk assessment, threat modeling, and management activities for telecom networks and emerging technologies like IoT and cloud. Ensure compliance with global and local telecom regulatory requirements (e.g., TRAI, DoT, GDPR, FCC, ETSI) through audits, reviews, and reporting. Manage and maintain telecom-specific security policies, technical and administrative controls, and compliance frameworks (ISO 27001, NIST, PCI-DSS). Act as the prime security and compliance interface towards customers, internal teams, auditors, subcontractors, and third-party suppliers. Develop and maintain a risk register, tracking treatment plans and mitigation strategies across client environments. Provide proactive consultation and guidance to customers regarding security best practices and compliance requirements. Oversee incident and crisis response activities to minimize business impact and regulatory exposure, ensuring adherence to notification guidelines. Ensure vendor security due diligence, contract compliance, and ongoing third-party risk monitoring within the telecom supply chain.

"> Search Jobs Find Jobs For Where Search Jobs SOC Engineering, Staff Engineer Noida, Uttar Pradesh, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 8601 Remote Eligible No Date Posted 22/04/2025 Alternate Job Titles: Staff SOC Engineer Senior SOC Design Engineer Lead SOC Engineer We Are: You Are: You are an experienced and motivated SOC Engineer with a passion for cutting-edge technology and innovation. With a strong background in system-on-chip (SOC) design and verification, you bring a wealth of knowledge and a keen eye for detail. You thrive in a collaborative environment, working seamlessly with cross-functional teams to deliver high-quality solutions. Your problem-solving skills are exceptional, and you have a proven track record of successfully managing complex projects. You are proactive, adaptable, and always eager to learn and grow in a dynamic and fast-paced setting. What You ll Be Doing: Designing and implementing SOC solutions for various applications, ensuring high performance and reliability. Collaborating with cross-functional teams to define and develop SOC architecture and specifications. Conducting verification and validation of SOC designs to ensure compliance with industry standards and customer requirements. Optimizing SOC designs for power, performance, and area (PPA) to meet project objectives. Debugging and resolving issues in SOC designs, utilizing advanced tools and methodologies. Providing technical guidance and mentorship to junior engineers, fostering a culture of continuous improvement and innovation. Job Description and Requirements The role is for RTL Design and Signoff of IP/Subsystem/SoC Design in the System Solutions Group (SSG). At SSG, we are a team of experts in various Synopsys technologies to deliver architecture, design, verification, implementation, tools, methodology to enable our customers complete their most challenging SoC Design projects. Our work spans from sub-blocks to full turnkey end-to-end SoCs. Our customers range from start-ups to industry leaders, commercial companies, and government agencies. As part of this role, you can expect to develop and deliver your expertise in RTL Signoff and RTL Design Techniques while working on activities such as Lint/CDC/RDC Checks, Timing Constraints Development, Preliminary Synthesis, Formality and RTL Design. The role will expose you to various innovative technologies deployed for RTL Quality Signoff for Semiconductors. Responsibilities Perform RTL Quality Signoff Checks such as LINT, CDC, RDC. Understand the design/architecture and develop timing constraints for synthesis and timing. Run preliminary synthesis to ensure that the design can be synthesized as intended. Run formality to ensure equivalence of RTL and gates. Integrate IPs in SoCs/Subsystems and create RTL design as per need of the customer. Required B.E/B. Tech/M.E/M. Tech in electronics with 4-9 years experience in RTL Design and Verification. Hands-on experience on static verification tools such as Spyglass performing LINT, CDC, RDC. Good conceptual understanding of design/architecture pitfalls across clock/reset domain crossing. Good conceptual understanding of RTL rule checks. Hands-on experience on synthesis and timing constraints development. Candidates with experience on ARM based technologies (Coresight Debug, Processor architecture, etc.) will be preferred. The Team You ll Be A Part Of: You will join a highly skilled and motivated team dedicated to developing advanced SOC solutions. Our team focuses on innovation, collaboration, and excellence, working together to deliver high-quality designs that drive technological advancements. We value diversity and inclusion, fostering a supportive and dynamic environment where every team member can thrive and contribute to our success. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. *Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Noida View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

We are seeking innovative and out-of-the-box thinking Design For Test (DFT) Engineers to be a part of the Fast Solution Team under the Test Group at Synopsys. You are someone who thrives in a project-oriented environment, delivering comprehensive DFT solutions ranging from integration to silicon bring-up for customers designing digital ICs of varying complexity. You excel in assessing customer methodologies and flows, gathering requirements, and proposing solutions. You are adept at providing technical support to ensure customer success and satisfaction, winning new customers through product demonstrations, evaluations, and competitive benchmarking. You are skilled in resolving technical problems, training, and account management, and you can interact effectively with end-users at customer sites and with first-level managers. You are also responsible for working with Solution Architects to develop and productize the next-gen test technologies. Your role involves prototyping new methodologies, analyzing gathered data, identifying the viability of technology, and presenting the findings under the guidance of a Solution Architect. What You ll Be Doing: Providing expertise for test solutions during design planning, budgeting, and implementation. MBIST implementation and validation, including BIST architecture planning, memory grouping, pattern generation, validation, silicon bring-up, diagnostics analysis, and debug. Participating in customer s design and flow reviews. Driving, prototyping, and developing new Design for Test methodologies. Multitasking across various issues and priorities to help customers exploit new technologies. Collaborating with Solution Architects to develop and productize next-gen test technologies. The Impact You Will Have: Enhancing Synopsys ability to deliver cutting-edge test solutions that meet customer needs. Contributing to the successful integration and silicon bring-up of complex digital ICs. Ensuring high customer satisfaction through effective technical support and problem resolution. Driving innovation in test methodologies and technologies. Supporting the development of next-gen test technologies that push the boundaries of whats possible. Playing a key role in winning new customers and expanding Synopsys market presence. What You ll Need: Minimum BS+10 years of relevant experience/MS+8 years of relevant experience in Electrical Engineering, Computer Engineering, or other relevant fields of study. Experience with RTL coding, DFT insertion, ATPG, MBIST architecture planning, insertion, validation, pattern generation, and silicon bring-up. Excellent knowledge of memory BIST flows, memory fault models, MBIST algorithms, hard/soft repair, and eFuse repair flow. Experience in handling memory BIST for large, complex SoCs with various IPs. Exposure to MBIST of automotive designs is a plus. Good understanding of protocols like 1149.1, 1500, 1687.

Working on producing highly optimized hardware IP for the ARC family of configurable processors. Collaborating with an international multi-disciplinary team on the qualification, benchmarking, and test chip implementation of new microprocessor IPs. Participating in in-house test chip designs and development platforms to learn about potential applications of our microprocessor IPs. Assisting in customer sales and design-ins of our IP, providing technical support and expertise. Implementing a comprehensive implementation flow that is configurable and supported by Synopsys memory compilers and standard cell libraries. Ensuring the highest standards of quality in physical verification and IR processes. The Impact You Will Have: Contributing to the development of cutting-edge microprocessor IPs that set industry standards. Enhancing the capabilities of our customers by enabling them to develop highly sophisticated embedded designs. Driving the success of our products through your expertise in physical verification and IR. Supporting our sales team by providing technical insights and facilitating design-ins. Improving the efficiency and configurability of our implementation flows. Helping to position Synopsys as a leader in the semiconductor industry through continuous innovation. What You ll Need: Bachelor s degree in electronics engineering or computer science; Master s degree is a plus. Minimum of 5 years of related experience in physical verification and IR. Proficiency in Verilog/VHDL. Expertise in Unix, Perl, and TCL scripting. Understanding of microprocessor design is highly desirable. Who You Are: A detail-oriented professional with strong analytical skills. An excellent communicator with the ability to convey complex technical concepts effectively. A team player who thrives in a collaborative, international environment. A proactive learner who stays updated with the latest industry trends and technologies. A problem solver who enjoys tackling challenging technical issues

The candidate would be part of the VIP group responsible for development of Verification IPs. Core responsibilities would include Designing and developing the VIP/Test-bench, Creating Verification plans, Coding sequences/Test-scenarios, Coverage driven verification. The responsibility would also include enhancement of the existing Verification IP products and interface with customers during VIP deployment. This is an opportunity to work with best-in-class verification, debug tools, Design IP & close collaboration with best protocol experts in the industry. You will work with highly professional and motivated colleagues who value and support your contribution. Requirements: Bachelors/masters with good academic record. 7+ years experience in developing HVL based verification environments, preferably using System Verilog. Exposure to coverage driven verification. Experience in verification methodologies like UVM/OVM. Exposure to complex SV test benches involving multiple protocols and VIPs. Experience in VIP development is highly desirable. Should have a strong work exposure on any of the industry standard protocols like PCIe, USB, Ethernet, MIPI etc.. Demonstrates good analysis and problem-solving skills. Have a strong passion for work and driving things to closure.

Implementing and power signoff of world-class DDRs at cutting-edge technology nodes. Achieving timing closure above ~2GHz and integrating mixed signal macro IPs. Building efficient clock trees with very tight skew balancing. Providing regular updates to your manager on project status. Guiding junior peers with aspects of their job and contributing to their development. Representing the organization on business unit and/or company-wide projects. The Impact You Will Have: Driving the implementation of cutting-edge DDR technology, contributing to the advancement of high-performance computing. Ensuring the power efficiency and performance of our silicon chips, crucial for our competitive edge. Enhancing the reliability and integration of mixed signal macro IPs. Contributing to the overall success and innovation of Synopsys IP solutions. Mentoring junior engineers, fostering a culture of continuous learning and improvement. Representing Synopsys in key projects, influencing the direction and success of our initiatives. What You ll Need: Minimum of 5+ years of related experience in ASIC Physical Design. Proficiency in tools like DC, ICC2, StarRC, and PT-SI. Strong understanding of timing closure, power signoff, and mixed signal macro IP integration. Experience with DDR power signoff and clock tree building. Excellent problem-solving and analytical skills. Who You Are: A strong team player with excellent communication skills. Independent and collaborative, capable of working with minimal supervision. Creative and innovative, able to develop unique solutions to complex problems. Detail-oriented and organized, ensuring high-quality project outcomes. Passionate about continuous learning and professional growth.

We are looking for a highly motivated individual, with expertise in IC design and physical implementation for a group with growth opportunities. Responsibilities include complete digital implementation from RTL to GDS including Synthesis, Floor-Planning, Power Planning and Analysis, CTS, Placement and Routing, STA, Formal Verification, EMIR Signoff and physical verification. The individual will contribute both on the implementation side as well as flow development for a variety of advanced high performance interface IPs, Test chips & Subsystems at latest techno nodes. The successful candidate: - has solid engineering understanding of the underlying concepts of IC design, implementation flows and sign-off methodologies for deep submicron design. - has intimate knowledge of the full design cycle from RTL to GDSII, including development of timing constraints - has good scripting & programming skills (Perl, Tcl, Python etc); knowledge of CAD automation methods. - Can interface with the larger product team to understand design constraints, deliverable formats, customer requirements - Independent, timely decision maker and able to cope with interrupts - Knowledge of IP Subsystem implementation & FE flows are added advantages 8+ years of hands-on experience in ASIC physical implementation and EDA tools with recent contribution to project tape-outs. Must demonstrate knowledge of the Synopsys tools, flows and methodologies including Design Compiler, IC Compiler/2, Fusion Compiler, Primetime, Formality, Star-RCXT, Hercules/ICV and other industry tools.

Driving the physical implementation of high-speed interface IPs and test-chips from RTL to GDS. Managing timing and physical sign-off to ensure successful project tape-outs. Collaborating with multiple functional groups, including front-end, analog, and CAD teams. Focusing on advanced SerDes developments, including the latest 56/112G PAM4 standards. Leading the physical design team to ensure on-time delivery of projects. Utilizing your software and scripting skills to enhance CAD automation methods. The Impact You Will Have: Contributing to the successful delivery of high-performance silicon IPs that power the Era of Smart Everything. Ensuring the integration of more capabilities into SoCs, meeting unique performance, power, and size requirements. Reducing the risk and time-to-market for differentiated products. Driving technological innovation through advanced SerDes development. Enhancing Synopsys reputation as a leader in chip design and verification. Supporting the companys mission to power the world s most advanced technologies for chip design and software security. What You ll Need: 8+ years of physical design experience with recent contributions to project tape-outs. Intimate understanding of the full design cycle from RTL to GDSII, including chip level. Experience with advanced FinFET nodes, TSMC 16 nanometer or below. Solid understanding of IC design, implementation flows, and methodologies for deep submicron design. Proven track record for technical steering of physical design teams for on-time delivery. Who You Are: Excellent communicator with the ability to engage with peer groups and customers. Autonomous and capable of making timely judgments. Proficient in software and scripting skills (Perl, Tcl, Python). Knowledgeable in CAD automation methods and industry standards in deep sub-micron designs. Able to travel internationally as required.

Designing and verifying complex Analog Mixed-Signal layouts, ensuring high-quality and reliable IPs. Collaborating with cross-functional teams to optimize layout designs for performance and manufacturability. Utilizing advanced tools and methodologies to mitigate deep submicron effects. Conducting floor-planning, routing, and top-level verification. Ensuring compliance with DRC, LVS, LPE standards and addressing ESD and latch-up considerations. Optimizing power routes and addressing EM and IR considerations for robust designs. The Impact You Will Have: Enhancing the performance and reliability of our high-speed SerDes IPs and other critical components. Driving innovation in Analog Mixed-Signal layout design, contributing to cutting-edge technology developments. Ensuring seamless integration and functionality of our IPs in diverse applications. Improving design efficiency and manufacturability through advanced layout techniques. Contributing to the success of our product development lifecycle by delivering high-quality designs. Supporting our mission to lead in chip design and IP integration, shaping the future of technology. What You ll Need: 6+ years of experience in Analog Mixed-Signal layout and verification. Advanced understanding of deep submicron effects and mitigation techniques. Proficiency in using advanced layout design tools and methodologies. Solid understanding of CMOS and FinFET layouts and process technology in 28nm and below. Familiarity with layout design flow, including top-level verification flow, DRC/LVS, LPE.

Developing next-generation high-speed memory interface PHY IPs (DDR/HBM/UCIe) Executing projects in advanced technologies with a focus on analytical and problem-solving skills Designing high-speed IOs for memory interface PHY IP in CMOS/FinFET/GAA Collaborating with cross-functional teams globally to achieve project goals Ensuring product quality and efficiency in all design tasks Staying updated with the latest industry standards and technological advancements The Impact You Will Have: Driving the development of innovative high-speed memory interface PHY IPs Contributing to the integration of advanced capabilities in SoCs Enhancing the performance, power efficiency, and size optimization of target applications Reducing risk and accelerating time-to-market for differentiated products Collaborating with global teams to deliver high-quality products Setting industry benchmarks for advanced analog design technologies What You ll Need: BTech/MTech degree in a relevant field 3+ years of experience in analog design fundamentals and device physics Proficiency in high-speed IO designs in advanced technologies Experience with ESD and reliability concepts Knowledge of JEDEC requirements for memory interfaces and standards Familiarity with signal integrity and/or power integrity is a plus Who You Are: An analytical thinker with strong problem-solving skills A collaborative team player with excellent communication and interpersonal skills Detail-oriented and capable of executing tasks with high precision and efficiency Adaptable and eager to learn new technologies and industry standards Passionate about innovation and technological advancement

We are seeking an experienced analog design manager to lead our high-performance SERDES IP design team. This senior role will oversee all aspects of analog IP development and execution for cutting-edge SerDes architectures targeting advanced process nodes. Responsibilities: - Manage and mentor a team of 8-10 senior analog designers focused on high-speed SerDes IP development across multiple projects - Define architecture specifications and circuit implementation requirements for next-generation SerDes PHY IPs - Ensure adherence to project schedules, quality metrics, power/area targets through effective team oversight - Collaborate with cross-functional teams (digital design, physical design, CAD) to integrate analog IP components - Partner with process engineering teams to enable robust analog IP across advanced FinFET nodes - Continuously drive design methodology improvements and adoption of latest EDA tools/flows - Develop and manage operational plan, including staffing, budgets and resource allocation - Hire, develop and retain top analog engineering talent through active mentorship Requirements: - Bachelors degree in electrical engineering; advanced degree preferred -8+ years of experience in analog/mixed-signal IC design with a strong background in SerDes architectures - 2+ years of people management experience leading high-performance analog design teams - Proven expertise in high-speed I/O design, architectures, circuits, and layout implementation - Extensive knowledge of CDR, DFE, CTLE, EQ, decision feedback equalizer design techniques - Hands-on experience with analog/mixed-signal design flows, tools (Cadence, Synopsys), modeling - Understanding of FinFET transistor characteristics and design challenges at advanced nodes - Strong project management skills with the ability to manage multiple priorities - Excellent communication and people leadership abilities to motivate cross-functional teams

Leading the development of next-generation high-speed memory interface IPs (DDR/HBM/UCIe). Driving projects in new technologies with a focus on analytical and problem-solving skills. Acting as a technical mentor to ensure schedules and product quality are met. Developing and maintaining project schedules, working in cross-functional settings. Demonstrating proficiency in design concepts and methodologies. Taking on people management responsibilities, guiding and developing your team. The Impact You Will Have: Contributing to the development of cutting-edge memory interface PHY IPs that drive technological advancements. Ensuring high-quality product development through effective leadership and technical expertise. Mentoring and guiding your team to achieve their full potential and meet project goals. Collaborating with cross-functional teams to drive innovation and efficiency. Maintaining Synopsys leadership position in the semiconductor industry by delivering top-notch IPs. Shaping the future of technology through continuous innovation and excellence. What You ll Need: Bachelor s or Master s degree in Electrical Engineering or related field. 10+ years of experience in analog/mixed signal design. Knowledge of deep submicron process technologies - CMOS/FinFET/GAA. In-depth understanding of JEDEC requirements for memory interfaces and standards. Familiarity with ESD concepts and signal integrity/power integrity is a plus. Proven ability to lead projects and deliver high-quality products efficiently. Excellent written and verbal communication skills. Who You Are: A visionary leader with a passion for analog design and innovation. Analytical and detail-oriented with strong problem-solving skills. An effective communicator and mentor, capable of guiding and developing your team. Proactive and adaptable, able to thrive in cross-functional settings. Committed to delivering high-quality products and driving technological advancements.

Leading the development of next-generation DDR/HBM/UCIe IPs. Advising team members to meet schedules and resolve problems effectively. Taking on project leadership roles and contributing to complex project aspects. Developing and maintaining project schedules, ensuring timely delivery. Collaborating in cross-functional settings to drive project success. Demonstrating proficiency in design and verification processes. The Impact You Will Have: Driving innovation in next-generation DDR/HBM/UCIe IP development. Enhancing the performance and capabilities of our Silicon IP portfolio. Ensuring high-quality and efficient project execution. Mentoring and guiding team members to achieve their full potential. Contributing to the rapid integration of advanced technologies into SoCs. Helping Synopsys maintain its leadership in the semiconductor industry. What You ll Need: Bachelor s or Master s degree in Electrical Engineering or a related field. 8+ years of experience in CMOS circuit design and layout methodology. In-depth understanding of analog/mixed-signal circuitry and ESD concepts. Familiarity with analog mixed-signal simulation strategies. Knowledge of JEDEC standards for DDR interfaces and ASIC design flow. Who You Are: Visionary leader with strong problem-solving skills. Excellent communicator with the ability to lead and mentor teams. Detail-oriented and proficient in project management. Adaptable and able to thrive in cross-functional settings. Committed to achieving high standards of product quality and efficiency

* Responsible for functional verification involving coherent and non-coherent IP designs. * Collaborating with market leaders in High Performance Computing, Data Centre, Mobile/Client, Automotive, and IoT segments to define and develop products that meet complex verification requirements. * Architecting and building SystemVerilog UVM-based verification components, testbenches, checkers, scoreboards, and verification IPs. * Developing verification plans and driving functional coverage-driven verification closure of real designs. * Debugging and resolving issues in verification environments to ensure robust and reliable verification processes. The Impact You Will Have: * Enhancing the reliability and performance of high-performance computing and data center systems through rigorous verification processes. * Contributing to the advancement of mobile and client devices by ensuring the integrity and functionality of their verification protocols. * Driving innovation in the automotive sector by developing robust verification solutions for automotive systems. * Supporting the growth of IoT applications by providing reliable and efficient verification for IoT devices. * Collaborating with industry leaders to shape the future of system verification and contribute to technological advancements. * Ensuring the successful implementation and integration of verification IPs, thereby enhancing the overall quality of our products. What You ll Need: * B.E/B.Tech in Electrical Engineering/Electronics & Communications Engineering with 5-8 years of relevant experience, OR M.E/M.Tech in VLSI Design/Microelectronics with 4-8 years of relevant experience. * Hands-on experience in architecting and building SystemVerilog UVM-based verification components, testbenches, checkers, scoreboards, and verification IPs. * You will be involved in creating System verification solutions for Arm AMBA5 protocols such as CHI, AXI5/ACE5 for on-chip, chi-to-chip, die-to-die, coherent and non-coherent design topologies. * You will be responsible for functional verification involving coherent and non-coherent IP designs. * Proficiency in writing scripts using Perl, Python, and Shell scripting. Who You Are: * Excellent problem-solving, debugging, and analytical skills. * Strong programming skills and familiarity with object-oriented programming concepts. * Creative and innovative mindset. * Excellent verbal and written communication skills. * A collaborative team player with a passion for functional verification.

* Responsible for functional verification involving coherent and non-coherent IP designs. * Collaborating with market leaders in High Performance Computing, Data Centre, Mobile/Client, Automotive, and IoT segments to define and develop products that meet complex verification requirements. * Architecting and building SystemVerilog UVM-based verification components, testbenches, checkers, scoreboards, and verification IPs. * Developing verification plans and driving functional coverage-driven verification closure of real designs. * Debugging and resolving issues in verification environments to ensure robust and reliable verification processes. The Impact You Will Have: * Enhancing the reliability and performance of high-performance computing and data center systems through rigorous verification processes. * Contributing to the advancement of mobile and client devices by ensuring the integrity and functionality of their verification protocols. * Driving innovation in the automotive sector by developing robust verification solutions for automotive systems. * Supporting the growth of IoT applications by providing reliable and efficient verification for IoT devices. * Collaborating with industry leaders to shape the future of system verification and contribute to technological advancements. * Ensuring the successful implementation and integration of verification IPs, thereby enhancing the overall quality of our products. What You ll Need: * B.E/B.Tech in Electrical Engineering/Electronics & Communications Engineering with 5-8 years of relevant experience, OR M.E/M.Tech in VLSI Design/Microelectronics with 4-8 years of relevant experience. * Hands-on experience in architecting and building SystemVerilog UVM-based verification components, testbenches, checkers, scoreboards, and verification IPs. * You will be responsible for functional verification involving coherent and non-coherent IP designs. * Proficiency in writing scripts using Perl, Python, and Shell scripting. Who You Are: * Excellent problem-solving, debugging, and analytical skills. * Strong programming skills and familiarity with object-oriented programming concepts. * Creative and innovative mindset. * Excellent verbal and written communication skills. * A collaborative team player with a passion for functional verification. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Location: Delhi (with travel) Experience: 4-5+ Years Reporting To: Editor-in-Chief Role Summary We are seeking a Features Editor with a strong editorial vision, storytelling expertise, and a deep passion for travel and luxury. This role is ideal for someone who thrives on curating compelling narratives, securing exclusive interviews, and shaping the voice of Travel + Leisure India South Asia across print and digital platforms. The ideal candidate will have a strong network in the media, lifestyle, and luxury industries and will play a key role in shaping the magazine s features, special issues, and long-form storytelling. Key Responsibilities 1. Editorial Vision Content Development Curate and commission features that align with Travel + Leisure s editorial direction, ensuring a mix of destination coverage, culture, luxury, and experiential travel, both profiles, industry features, and opinion articles. Develop deep-dive, narrative-driven pieces across print, digital, and video formats. Lead special editorial projects, including special supplements, themed issues, anniversary editions, and multi-platform storytelling campaigns. 2. Industry Engagement Story Sourcing Maintain and grow relationships with writers, photographers, content creators, and thought leaders in travel, hospitality, and luxury. Secure exclusive interviews with global travel icons, hoteliers, designers, and cultural influencers. Identify emerging travel trends, ensuring the brand remains ahead of the curve. 3. Cross-Platform Integration Brand Growth Work closely with digital and social teams to ensure that print features translate seamlessly to digital and social media. Support editorial IPs, such as roundtables, video series, and podcasts, expanding the brand s storytelling footprint. Oversee native content and branded features, ensuring they maintain editorial integrity while meeting client objectives. 4. Live Events Special Initiatives Collaborate on high-profile industry events, including the Delicious Dining Awards, Indias Best Awards, roundtables, and luxury brand partnerships. Represent Travel + Leisure India South Asia at global travel conferences, fashion weeks, and hospitality summits. Drive editorial curation for live panels, interviews, and special projects that elevate the brand s thought leadership. 5. Editorial Calendar Performance Tracking Ensure the editorial calendar is aligned across print, digital, and social platforms, reflecting seasonal, industry, and cultural moments. Collaborate with data and insights teams to track reader engagement, using analytics to refine editorial strategies. Key Skills Competencies Editorial Content Expertise Strong experience in writing, editing, and commissioning long-form travel and luxury features. A deep understanding of narrative journalism, luxury media, and experiential storytelling. Network Industry Knowledge Established relationships with writers, photographers, PR teams, and cultural tastemakers. Knowledge of global travel trends, hospitality, FB, fashion, and luxury lifestyle. Strategic Cross-Platform Thinking Ability to craft multi-platform content strategies that extend across print, digital, video, and events. Experience with SEO, CMS platforms, and audience engagement strategies. Qualifications Experience Bachelor s or Master s degree in journalism, communications, or related fields. 4-5+ years of experience in editorial roles within luxury, lifestyle, or travel media. A proven ability to deliver impactful, high-quality editorial content. What We Offer A dynamic and fast-paced work environment at the intersection of travel, luxury, and media. Opportunities to work with leading global brands, industry pioneers, and creative visionaries. Competitive salary, travel opportunities, and a platform to shape premium travel journalism in India South Asia. About Us BurdaLuxury is one of Asia s most vibrant and progressive independent media houses. Our portfolio includes a variety of successful regional publishing brands in lifestyle and luxury markets across Hong Kong, India, Malaysia, Singapore, and Thailand. Print publications include AUGUSTMAN, HELLO! Magazine Thailand, Prestige, and PIN Prestige. Digital offerings include Lifestyleasia.com, Augustman.com, PrestigeOnline.com and PinPrestige.com. BurdaLuxury is part of the Hubert Burda Media family, one of the largest media companies in Germany. Burda is active in 17 countries, employs more than 12,000 people and publishes around 600 products. If you re passionate about redefining the future of travel media, we d love to hear from you.

Role Summary We are seeking a Features Editor with a strong editorial vision, storytelling expertise, and a deep passion for travel and luxury. This role is ideal for someone who thrives on curating compelling narratives, securing exclusive interviews, and shaping the voice of Travel + Leisure India South Asia across print and digital platforms. The ideal candidate will have a strong network in the media, lifestyle, and luxury industries and will play a key role in shaping the magazine s features, special issues, and long-form storytelling. Key Responsibilities 1. Editorial Vision Content Development Curate and commission features that align with Travel + Leisure s editorial direction, ensuring a mix of destination coverage, culture, luxury, and experiential travel, both profiles, industry features, and opinion articles. Develop deep-dive, narrative-driven pieces across print, digital, and video formats. Lead special editorial projects, including special supplements, themed issues, anniversary editions, and multi-platform storytelling campaigns. 2. Industry Engagement Story Sourcing Maintain and grow relationships with writers, photographers, content creators, and thought leaders in travel, hospitality, and luxury. Secure exclusive interviews with global travel icons, hoteliers, designers, and cultural influencers. Identify emerging travel trends, ensuring the brand remains ahead of the curve. 3. Cross-Platform Integration Brand Growth Work closely with digital and social teams to ensure that print features translate seamlessly to digital and social media. Support editorial IPs, such as roundtables, video series, and podcasts, expanding the brand s storytelling footprint. Oversee native content and branded features, ensuring they maintain editorial integrity while meeting client objectives. 4. Live Events Special Initiatives Collaborate on high-profile industry events, including the Delicious Dining Awards, Indias Best Awards, roundtables, and luxury brand partnerships. Represent Travel + Leisure India South Asia at global travel conferences, fashion weeks, and hospitality summits. Drive editorial curation for live panels, interviews, and special projects that elevate the brand s thought leadership. 5. Editorial Calendar Performance Tracking Ensure the editorial calendar is aligned across print, digital, and social platforms, reflecting seasonal, industry, and cultural moments. Collaborate with data and insights teams to track reader engagement, using analytics to refine editorial strategies. Key Skills Competencies Editorial Content Expertise Strong experience in writing, editing, and commissioning long-form travel and luxury features. A deep understanding of narrative journalism, luxury media, and experiential storytelling. Network Industry Knowledge Established relationships with writers, photographers, PR teams, and cultural tastemakers. Knowledge of global travel trends, hospitality, FB, fashion, and luxury lifestyle. Strategic Cross-Platform Thinking Ability to craft multi-platform content strategies that extend across print, digital, video, and events. Experience with SEO, CMS platforms, and audience engagement strategies. Qualifications Experience Bachelor s or Master s degree in journalism, communications, or related fields. 4-5+ years of experience in editorial roles within luxury, lifestyle, or travel media. A proven ability to deliver impactful, high-quality editorial content. What We Offer A dynamic and fast-paced work environment at the intersection of travel, luxury, and media. Opportunities to work with leading global brands, industry pioneers, and creative visionaries. Competitive salary, travel opportunities, and a platform to shape premium travel journalism in India South Asia.

This role includes defining and developing practice offerings, driving pre-sales and delivery support, showcasing thought leadership, and fostering team growth through competency development. Essential skills include expertise in AI/ML, Data Science, BI, and Data Engineering, along with leadership and pre-sales experience. Why Choose Ideas2IT: Ideas2IT has all the good attributes of a product startup and a services company. Since we launch our products, you will have ample opportunities to learn and contribute. However, single-product companies stagnate in the technologies they use. In our multiple product initiatives and customer-facing projects, you can work on various technologies. AGI is going to change the world. Big companies like Microsoft are betting heavily on this (see here and here ). We are following suit. As a Technical Architect, exclusively focus on engineering complex products. What s in it for you You will define, develop, and maintain the AI, Data, and Analytics practice offerings portfolio. Opportunity to work on pre-sales activities, including proposals, estimations, PoCs, presentations, and demos. Lead project execution, deploying team members, and overseeing projects to ensure high-quality delivery. Engage in thought leadership by contributing to blogs, whitepapers, and social media. Drive people leadership by hiring, mentoring, and upskilling team members through structured programs. Here s what you ll bring Prior experience in a Practice Manager / Practice Head role in relevant areas (AI, Data Analytics): 8-10 years. Overall (tech) industry experience: 15-20 years. Expertise in AI, Data, Analytics, BI, DWH, ML, and related technologies. Strong leadership skills with the ability to mentor, coach, and motivate team members. Pre-sales and practice management expertise. Customer interfacing, presentation, and consulting skills. Technology expertise in Cloud, Web, and Mobile Applications, and Automation. Consulting and sales experience with domain knowledge in verticals like Healthcare or BFSI. Experience in developing thought leadership collateral such as IPs, solutions, and frameworks. Ability to design competency development and certification programs for team members. Proven track record of scaling practices and achieving high revenue growth. Graduate / Post Graduate Degree Any qualifications (e.g., certifications) in leadership/people management will be a plus.

Position Summary Role and Responsibilities About Samsung Semiconductor India Research (SSIR) With a wide range of industry-leading semiconductor solutions, we are enabling innovative growth in market segments in component solutions, featuring industry-leading technologies in System LSI, Memory and Foundry. Our engineers are offered a foundation to work on cutting-edge technologies such as Foundation IP Design, Mobile SoCs, Storage Solutions, AI/ML, 5G/ 6G solutions, Neural processors, Serial Interfaces, Multimedia IPs and much more. As one of the largest R&D centers outside Korea for Samsung Electronics, we take pride in our ability to work on some of the cutting edge technologies. Our engineers get to work across diverse domains, projects, products, clients, people and countries, and conduct research in new and emerging technology areas. Innovation and creativity are highly valued at this innovation hub, as we strive towards providing high reliability; high performance and value added services that enable Samsung Electronics deliver world-class products. Roles and Responsibilities Windows Driver development Design, Development and support windows driver development for PCI/PCIe/PXI/PXIe interfaces to communicate with embedded platforms Work with Architecture, HW and other stakeholders to understand requirements and product architecture Develop unit test frameworks Integrate and cover Windows certification for device drivers Required qualifications Electronics, Electrical or Computer science graduate with 6-10 years of experience Experience in designing, coding and debugging in Windows, C/C++/C# Kernel or device driver experience with understanding of HW/SW interaction Experience in System SW development on Windows Experience with developing software communicating to embedded platforms At least 2 years of experience with drivers on PCIe Experience - 6 to 10 Years Qualifications B.Tech/B.E/M.Tech/M.E Disclaimer Samsung Semiconductor India Research (SSIR), a division of Samsung R&D India - Bangalore Pvt. Ltd is dedicated to employing a diverse workforce and providing Equal Employment Opportunity to all individuals, regardless of their religion, gender, age, marital status, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law. Skills and Qualifications * Please visit Samsung membership to see Privacy Policy, which defaults according to your location. You can change Country/Language at the bottom of the page. If you are European Economic Resident, please click here .