36 Ip Integration Jobs - Page 2

As a member of the Cadence team, you will have the opportunity to contribute to the world of technology by utilizing your skills and expertise. You will be responsible for hands-on layout experience in various analog IP components such as Opamps, Bandgaps, Data converters, LDO, PLL, and more. Your role will involve understanding the impact of layout on the circuit regarding speed, capacitance, power, and area. Knowledge of analog layout techniques like matching, shielding, and familiarity with DSM technology methodology will be essential. Experience with the latest technology nodes, specifically 28nm and below, is preferred. Additionally, you will be expected to possess good communication sk...

As an RTL/FPGA Design Engineer in the VLSI domain, you will play a crucial role in developing FPGA-based products. With a focus on RTL programming using Verilog/System Verilog or VHDL, you will be responsible for optimizing RTL code to meet timing requirements and on-chip resource constraints. Your expertise in FPGA Development Tools such as Quartus, Modelsim, Vivado, Xilinx ISE, and Libero will be essential in ensuring the successful completion of projects. Your responsibilities will include functional verification using Verilog/System Verilog or VHDL, system architecture design, and testing/troubleshooting of hardware components. Additionally, you will be required to support all phases of ...

As an FPGA Firmware Engineer, you will be responsible for developing detailed specifications based on requirements and implementing FPGA designs in accordance with those defined requirements and/or specifications. You will collaborate with other members of the design team to evaluate possible alternatives during the development process and determine the best approach based on performance, cost, and resources. Additionally, you will perform simulation activities including timing analysis, behavioral, and functional simulations. Your role will also involve documenting ideas, designs, specifications, and instructions to comply with client standards. As a senior member of the team, you will ment...

You will be joining Synopsys, a company at the forefront of technological innovations that are shaping the way we live and connect in the Era of Pervasive Intelligence. Synopsys leads in TCAD, chip design, verification, and IP integration, enabling the development of high-performance silicon chips and software content. As part of this dynamic environment, you will have the opportunity to contribute to continuous technological innovation. As a highly skilled and knowledgeable professional with a deep passion for semiconductor physics and technology, you should hold a PhD or MS degree in Electrical Engineering, Physics, or Materials Sciences. Your expertise in semiconductor devices and process...

KEY RESPONSIBILITIES: Define and drive key Frontend/Beckend/Physical Design methodologies. Partner with AMD CAD Teams, Design team, physical design teams to ensure seamless end to end design flows. Work with existing development teams to define roadmaps for existing flows and assist in difficult technical debug. Work closely with design teams to gather requirements and develop strategies to tackle key technical problems. Work on Floor-plan, Physical Implementation of Power-plan, Synthesis, Placement, CTS, Timing Closure, Routing, Extraction, Physical Verification (DRC & LVS), Crosstalk Analysis, EM/IR Handling different PNR tools - Synopsys ICC2, ICC, Design Compiler, PrimeTime, StarRC, Ment...

KEY RESPONSIBILITIES: Implementing RTL to GDS2 flow Handling Floor-plan, Physical Implementation of Power-plan, Synthesis, Placement, CTS, Timing Closure, Routing, Extraction, Physical Verification (DRC & LVS), Crosstalk Analysis, EM/IR Handling different PNR tools - Synopsys ICC2, ICC, Design Compiler, PrimeTime, StarRC, Mentor Graphics Calibre, Apache Redhawk PREFERRED EXPERIENCE: 7+ years of professional experience in physical design, preferably with high performance designs. Experience in automated synthesis and timing driven place and route of RTL blocks for high speed datapath and control logic applications. Experience in automated design flows for clock tree synthesis, clock and power...

As a member of the Common Hardware Group (CHG) at Cisco, you will be part of a team that delivers cutting-edge silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. Our work involves designing networking hardware for Enterprises, Service Providers, Public Sector, and Non-Profit Organizations worldwide. Join us in shaping Cisco's groundbreaking solutions by participating in the design, development, and testing of advanced ASICs that are at the forefront of the industry. Your role will involve implementing Hardware Design-for-Test (DFT) features that support ATE, in-system test, debug, and diagnostics requirements of the designs. You will collabora...

Roles & Responsibilities: Lead the verification planning and execution for complex SoC designs. Define and implement testbenches using SystemVerilog/UVM methodologies. Work closely with architecture, design, and firmware teams to understand the design and develop test strategies. Drive block-level and full-chip verification , including IP integration . Perform coverage analysis , debug , and triage failures . Develop and maintain automation scripts to improve verification workflows. Mentor and guide junior verification engineers and drive best practices across the team. Ensure delivery on schedule with high quality and coverage metrics.

Minimum qualifications: You should hold a Bachelor's degree in Electrical Engineering, a related field, or possess equivalent practical experience. Additionally, you must have at least 5 years of experience in DFT specification definition architecture and insertion. A minimum of 3 years of experience using electronic design automation (EDA) test tools (e.g., Spyglass, Tessent) is required. Your background should also include experience with ASIC DFT synthesis, STA, simulation, and verification flow. It is essential to have experience collaborating with ATE engineers, involving tasks such as silicon bring-up, patterns generation, debug, validation on automatic test equipment, and resolution o...

Contribute to modeling, integration, and testing of various peripherals in SystemC-based platform modeling framework Understand IP modeling requirements and generate ESL model specifications Resolve technical issues related to IP modeling and platform integration Guide junior engineers and consultants on SoC platform creation and validation Support software bring-up and debug platform integration issues Collaborate with cross-functional teams to ensure successful execution and delivery The Impact You Will Have: Advance platform modeling and integration of high-performance silicon chips Improve efficiency and scalability of SystemC-based frameworks across domains like Automotive and Wireless ...

Introduction As a Hardware Developer at IBM, youll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable IBM customers to make better decisions quicker on the most trusted hardware platform in todays market. Your Role and Responsibilities : We are seeking highly motivated DFT engineer to be part of Hardware team. Join a great team of engineering professionals who are involved in development, validation, and delivery of DFT patterns for IBMs microprocessor chip design team. As a member of functional DFT team ( Power on Reset, Architecture Verification Program, Array BIST teams ), you will be required but n...