46 Ip Integration Jobs

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. To...

VLSI Back-end Services Practice Head/ VLSI Director Engineering Experience: 15+ years Desired Competencies Must-Head Create differentiated VLSI Services offerings, capabilities, and talent to exponentially grow VLSI services business. Ability to engage with customer design managers in technical discussions and secure design wins Create strong VLSI technical teams through training/upskilling and focused hiring. Mentor the VLSI team to ensure their skills are continuously advanced & aligned to customer/industry needs. Build strong customer relationships and deliver VLSI services projects. Create differentiated proposals to win new projects. Work within in-house resourcing teams and external pa...

As a member of the physical design team at AMD, you will play a crucial role in delivering the physical design of tiles and FullChip to meet challenging goals for frequency, power, and other design requirements for AMD's next-generation processors. Your work will be in a fast-paced environment on cutting-edge technology, collaborating with experienced professionals to shape the future of AI and beyond. Your attitude, analytical skills, and commitment to excellence will be key to driving innovation and solving the world's most important challenges. **Key Responsibilities:** - Implement RTL to GDS2 flow - Manage Floor-plan, Physical Implementation of Power-plan, Synthesis, Placement, CTS, Rout...

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiencesfrom AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challengesstriving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Toge...

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiencesfrom AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challengesstriving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Toge...

Title- Senior SoC Design Manager Location- Hyderabad, Telangana Duration- Full time About the Company Best Nano Tech is committed to innovation in the semiconductor industry, focusing on developing cutting-edge technologies that drive the future of embedded AI compute. About the Role As Senior SoC Design Manager, you will lead the design and development of next-generation mixed-signal, ARM-based SoCs. You will build and guide a world-class engineering team in Hyderabad and play a critical role in shaping our silicon roadmap for embedded AI compute. You'll work at the intersection of hardware, software, and AI, driving end-to-end SoC execution from concept and architecture through tape-out an...

Job Overview: Physical Design Engineer implements the entire ASIC/SoC back end design flow from RTL to GDSII to create design databases ready for manufacturing with a special focus on power, performance & area optimization with next generation state of the art process technologies. Physical Design Engineer Experience: 5 Years & above (Mandatory). Education: BE/ ME/B. Tech/M. Tech/MS or equivalent disciplines with an emphasis on VLSI design Location: Bengaluru, India EMPLOYMENT TYPE: FULL TIME Roles & Responsibilities: - Take complete ownership of the implementation of Block level designs and Chip level design - Responsible for planning and execution of all aspects of Physical Design includin...

Role Overview: You will be part of the Silicon One development organization as an ASIC Implementation Technical Lead focusing on Design-for-Test. Your primary responsibility will involve collaborating with Front-end RTL teams and backend physical design teams to comprehend chip architecture and drive DFT requirements early in the design cycle. Additionally, you will participate in crafting innovative next-generation networking chips, leading the DFT and quality process through the entire Implementation flow and post silicon validation phases, with exposure to physical design signoff activities. Key Responsibilities: - Manage the definition, architecture, and design of high-performance ASICs ...

As an FPGA Firmware Engineer at our company, your role will involve developing detailed specifications based on requirements and implementing FPGA designs. You will collaborate with other members of the design team to evaluate possible alternatives during the development process and determine the best approach based on performance, cost, and resources. Your responsibilities will also include performing simulation activities such as timing analysis, behavioural, and functional simulations. Additionally, you will document ideas, designs, specifications, and instructions to comply with client standards. Mentoring junior members of the business unit to promote design team abilities and establish...

Role Overview: You will be responsible for designing and developing synthesizable RTL using Verilog/SystemVerilog for complex ASIC/SoC blocks. Additionally, you will create micro-architecture specs and ensure that designs meet performance, power, and area targets. You will own RTL implementation, lint/CDC cleanup, and contribute to synthesis, STA, and DFT readiness. Collaboration with verification teams for test planning, debugging, and coverage closure will also be a key part of your role. Furthermore, you will integrate IPs into top-level SoC and resolve timing and functionality issues. Finally, you will support emulation, FPGA prototyping, and silicon bring-up activities with cross-functi...

Introduction As a Hardware Developer at IBM, you'll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable IBM customers to make better decisions quicker on the most trusted hardware platform in today's market. We are looking for a DFT lead to join our dynamic team and drive excellence in chip test strategies, design and testability. Your Role And Responsibilities We are seeking highly motivated DFT Engineer to be part of Hardware team. Join a great team of engineering professionals who are involved in development, validation and delivery of DFT patterns for IBM's chip design team. As a member of DFT team,...

You have a great opportunity as an RTL/FPGA Design Engineer with a minimum of 3-7 years of experience. Your role will involve RTL programming using Verilog/System Verilog or VHDL, knowledge of the complete FPGA Design Development flow, hands-on experience with FPGA Development Tools like Quartus, Modelsim, Vivado, Xilinx ISE, Libero, etc. Additionally, you will be responsible for functional verification using Verilog/System Verilog or VHDL, RTL Code Optimization to meet timings and fit on-chip resources, supporting all phases of FPGA based product development activities, system architecture design, and testing and troubleshooting of hardware. **Key Responsibilities:** - RTL programming using...

Role Overview: As a humble genius at Quest Global, you will lead the Full chip and Block level activities in the project. Your hands-on experience in full chip activities will be crucial in contributing to meaningful work and designing a brighter future for all. You will be part of a team of remarkably diverse engineers who believe in making the impossible, possible through engineering. Key Responsibilities: - Lead the Full chip and Block level activities in the project. - Hands-on experience in full chip activities. - Experience in Full Chip Integration activities such as Full Chip Floor Planning, Power Planning, Bus Planning, Full Chip timing, Full Chip Reliability, and Full Chip Physical ...

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 4 years of experience with digital logic design principles, RTL design concepts, and languages, such as Verilog or SystemVerilog. 3 years of experience in ASIC design flows and methodologies, IP integration (e.g., subsystems, memories, IO's and Analog IP) and RTL design. Experience with logic synthesis techniques to optimize RTL code, performance and power, as well as low-power design techniques. Preferred qualifications: Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science. Experience worki...

As an experienced ASIC RTL Design Engineer at MarvyLogic, you will be an integral part of our culture that values passion for technology solutions impacting businesses. You will have the opportunity to pursue your individual passions while gaining a deep understanding of various industries and emerging technologies to build futuristic and impactful solutions. Working with us may even help you evolve personally towards a more fulfilling life. **Key Responsibilities:** - Possessing 10+ years of ASIC RTL Design experience with proficiency in Verilog/System Verilog - Demonstrating experience with multiple clock and power domains - Having extensive experience in the integration and validation of ...

Role Overview: As a Senior RTL Design Lead at Synopsys, you will play a crucial role in leading complex ASIC digital subsystems from concept to silicon. You will be responsible for crafting subsystem architectures, developing functional specifications, implementing micro-architectures, and ensuring compliance with best RTL coding practices. Your expertise in industry-standard protocols such as PCIe, DDR, UFS, USB, and AMBA will be essential in integrating them within subsystem designs. Additionally, you will mentor junior engineers, participate in technical reviews, and drive innovation within the team. Key Responsibilities: - Lead the complete subsystem lifecycle, from requirements gatherin...

Description Job Title: Director, HW Design Job Location: Bangalore, India (This position requires a full-time, on-site presence in our Bangalore, India Office ) Job ID: AI2440 Job Description We are seeking a Design Team Manager to lead our SoC design team in Bangalore. This is a hands-on leadership role responsible for managing and scaling a team of front-end SoC design engineers, driving execution across multiple projects, and collaborating with cross-functional teams across architecture, verification, physical design, firmware, and software. You will play a pivotal role in defining, implementing, and delivering SiMa.ai's next-generation MLSoC designs. Areas Of Focus Lead a high-performing...

As a VLSI Engineer with 5-6 years of experience in the semiconductor industry, your role will involve working on complex SoC designs, collaborating with cross-functional teams, and delivering high-quality silicon solutions. Your key responsibilities will include: - Designing and developing RTL using Verilog / SystemVerilog for ASIC/FPGA. - Performing functional verification using UVM / SystemVerilog based testbench. - Working on synthesis, timing analysis, power analysis, and design for testability (DFT). - Collaborating with physical design, firmware, and validation teams to ensure design quality. - Understanding semiconductor process technologies and device physics. - Participating in desi...

As an ASIC/FPGA Designer, you will work closely with Algorithm and Architecture teams to understand and translate high-level algorithmic requirements into efficient hardware implementations. You will learn and analyze relevant protocols and standards, interpreting protocol specifications such as Ethernet, and applying them accurately in design. Your responsibilities will include: - Participating in all design stages, including micro-architecture definition, RTL coding (using Verilog/SystemVerilog/VHDL), and synthesis-friendly coding with timing-aware design. - Collaborating cross-functionally with the verification team for testbench development, debug support, and functional coverage closure...

As an ASIC Design Engineer at AMD, you will be part of the AMD IOHUB Team within the NBIO organization. Your primary responsibility will be to contribute to the development of cutting-edge I/O connectivity and virtualization technologies that power data center and machine learning workloads. This role involves working on various aspects of IP design, from architecture to execution. Your contributions will play a key role in ensuring the highest quality and industry-leading technologies are delivered to the market. Key Responsibilities: - Design complex IPs including control and datapath components. - Understand the functional and performance requirements of IOHUB in different SOCs. - Ensure ...

VLSI Domain RTL/FPGA Design Engineer(Experienced) Min 3 - 7 Years of Experience BE/B.Tech in Electronics/Electronics & Communication or ME/M.Tech in Electronics/VLSI Design or closely related degree Ahmedabad, Bangalore Roles & Responsibilities RTL programming (Verilog/System Verilog or VHDL). Knowledge of complete FPGA Design Development flow. Hands-on with FPGA Development Tools (Quartus, Modelsim, Vivado, Xilinx ISE, Libero, etc.). Functional verification using Verilog/System Verilog or VHDL. RTL Code Optimization to meet timings and fit on-chip resources. Support all phases of FPGA based product development activities. System Architecture Design. Testing and troubleshooting of hardware. ...

Job Title: RTL Design Engineers Exp Level: 2-3 yrs Loctaion: Hyderabad Job Description: Seeking a motivated RTL Design Engineer to develop, integrate, and verify digital logic using Verilog/SystemVerilog . Responsibilities include ASIC/SoC IP integration , linting, synthesis, and working closely with verification teams. Requires strong fundamentals in digital design , timing closure, and understanding of the ASIC flow. You'll debug simulation failures, implement ECOs, and support gate-level simulations. Collaborate with cross-functional teams (SW, DV, Physical Design) to achieve tapeout goals. Bachelor's or Master's degree in engineering in EE/CS is essential, along with 2-3 years of relevan...

Overview Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional SMTS Verification Engineer to join our Security IP team in Bangalore, India . In this role, you will be working with some of the brightest inventors and engineers in the world developing products that make data faster and safer. As a Lead MTS Verification Engineer, you'll play a pivotal role in the verification of secure ASIC cores developed by Rambus Security Division (RSD), working with cross functional teams including ASIC design engineers and architects, other verification engineers and system test engineers, security experts, and cryptographers. Cryptography and hardwa...

Responsible for planning and execution of all aspects of Physical Design including Synthesis, Floor planning, Place and Route, Clock Tree Synthesis, IP integration, Extraction, Physical Verification, and taking blocks to the closure. Job Description In your new role you will: Responsible for planning and execution of all aspects of Physical Design including Synthesis, Floor planning, Place and Route, Clock Tree Synthesis, IP integration, Extraction, Physical Verification, and taking blocks to the closure. Design Application Engineering (DAE) will be responsible for supporting project teams using Infineon Design System (Flows, Design Package & Design assistance). You will be the first point o...

Role Overview: You will be part of the Client Development Group (CDG) as a Design for Test engineer, responsible for developing logic design, RTL coding, simulation, DFT timing closure support, test content generation, and delivery to manufacturing for various DFx content. Your role will involve participating in the definition of architecture and microarchitecture features of the block, subsystem, and SoC under DFT being designed. You will apply various strategies, tools, and methods to write and generate RTL and structural code to integrate DFT. Additionally, you will optimize logic to qualify the design for power, performance, area, timing, and design integrity for physical implementation....