58 Ip Design Jobs

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5.0 - 8.0 years

10 - 20 Lacs

hyderabad

Work from Office

Hi all here we have openings for ASIC design engineer. Pls find below jd ASIC Design Engineer Experience : 5-9years Location : Hyderabad. Mode : work from Office Notice period: 0-30days Understanding of IP design, RTL coding, Verilog/SV Proficient in RTL simulation tools Knowledge of High-speed interfaces PCIe, Ethernet, DDR AMBA AXI/AHB/APB Protocol Strong knowledge of IP/SOC design methodologies Experience with scripting languages including Perl, Python, Unix shells and Make files. Excellent communication skills and experience working with global teams Setup ASIC QA flows for RTL design quality checks. Understand the design: top level interfaces, clock structure, reset structure, RAMs, CDC...

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5.0 - 7.0 years

0 Lacs

bengaluru, karnataka, india

On-site

RTL Design Engineer(CXL) Experience - 5+yrs Location- Bangalore JD Strong RTL designer with IP design experience SoC Integration Interconnect Generation for a given configuration CXL 3.1 and above design experience

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7.0 - 12.0 years

20 - 30 Lacs

kochi, hyderabad, bengaluru

Work from Office

Senior ASIC Engineer (IP RTL design targeted for SOC, Static checks, some basic protocols) Expertise in SoC subsystem/IP design Expertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog In depth knowledge on RTL quality checks (Lint, CDC) Knowledge of synthesis and low power is a plus Good understanding of AMBA bus protocols (AXI, AHB, ATB, APB) Good understanding of timing concepts Knowledge of one or more of the interface protocols a. PCIe b. DDR c. Ethernet d. I2C, UART, SPI Expertise in setting up and using tools like a. Spyglass Lint/CDC b. Synopsys DC c. Verdi/Xcellium Understanding of scripting languages like Make flow, Perl ,shell, python etc Un...

Posted 3 weeks ago

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6.0 - 10.0 years

0 Lacs

pune, maharashtra

On-site

As a potential candidate for the role at Alphawave Semi, you will be responsible for developing Interface and Analog IPs for internal ASIC or external customers. This will involve hands-on experience with Hard Analog or PHY blocks on circuit design in the latest finfet nodes like 16nm and 7nm. Your role will also include driving processes for a solid IP Development methodology to ensure success with customers and supporting multiple customers and IP deliveries. Additionally, you should have strong knowledge in all aspects of integration of IP related to logic design and verification, physical design, packaging, test, and characterization. To qualify for this position, you should have a minim...

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15.0 - 19.0 years

0 Lacs

pune, maharashtra

On-site

Role Overview: You will be joining Lattice Semiconductor as a Principal Engineer in the HW design team focusing on IP design and full chip integration. This role based in Pune, India offers ample opportunities to contribute, learn, innovate, and grow within a dynamic team. Key Responsibilities: - Lead the design and development of complex components of FPGA to ensure they meet performance, power, and area targets. - Drive Subsystem development and ensure designs meet high standards of quality and reliability by conducting regular reviews and audits. - Collaborate closely with the architecture team to define micro-architecture and design specifications. - Act as a technical expert in SoC desi...

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1.0 - 5.0 years

0 Lacs

karnataka

On-site

As a Hardware Engineer at Qualcomm India Private Limited, you will be involved in planning, designing, optimizing, verifying, and testing electronic systems to launch cutting-edge, world-class products. Your role will encompass a wide range of systems including circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems. Collaboration with cross-functional teams will be essential to develop solutions that meet performance requirements. **Key Responsibilities:** - Working experience (2+ years) in preferably Memory design - Compiler approach of developing embedded SRAM/ROM development - Fundamental know-how on bit cell and it...

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5.0 - 7.0 years

0 Lacs

bengaluru, karnataka, india

On-site

RTL Design Engineer(CXL) Experience - 5+yrs Location- Bangalore JD Strong RTL designer with IP design experience SoC Integration Interconnect Generation for a given configuration CXL 3.1 and above design experience

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5.0 - 10.0 years

10 - 20 Lacs

hyderabad, bengaluru

Work from Office

SoC Subsystem/IP Design Expertise RTL Design and Integration using Verilog/SystemVerilog IP,Subsystem/Cluster, and SoC level RTL Quality Checks AMBA Bus Protocols Experience with EDA Spyglass Lint/CDC Synopsys Design Compiler Perl, Shell, Python

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2.0 - 6.0 years

0 Lacs

karnataka

On-site

You will be responsible for designing and developing Debug IPs focusing on CoreSight based IPs. Your expertise in RTL design using Verilog and/or SystemVerilog for complex SoC development will be crucial in creating efficient and reliable IPs. Additionally, your knowledge of Arm-based designs and/or Arm System Architectures will be utilized to optimize IPs. Collaboration with cross-functional teams and ensuring IP delivery within specified timelines will be a key aspect of your role. Implementing rigorous verification processes to meet functional and performance requirements will also be part of your responsibilities. - Debug IP Design: Design and develop CoreSight based Debug IPs to meet re...

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5.0 - 9.0 years

0 Lacs

hyderabad, telangana

On-site

You would be responsible for leading the implementation of the architecture and design of memory technologies such as SRAM, Register Files, ROM generators, etc. Your role would involve combining knowledge across various domains including AI, compilers, computer architecture, analog circuits, and memories. Key Responsibilities: - Have a fundamental understanding of bit cell and its characteristics (SNM, WM, Cell current, Standby current, data retention, etc.) - Possess expertise in process variability and circuit reliability issues affecting power, speed, area, and yield - Demonstrate a strong understanding of custom circuit design and layout in finFET-based CMOS technologies - Expertise in c...

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3.0 - 12.0 years

0 Lacs

karnataka

On-site

As a RTL/IP Design Engineer at Sykatiya Technologies, you will be an integral part of our highly talented team that contributes to customer projects with Technical Ability and the right Attitude. With a focus on Design Verification, DFT/Test, Physical Design, and Analog Design for ASICs, you will have the opportunity to showcase your skills and expertise. Key Responsibilities: - Possess 5+ years of experience in digital ASIC front-end design - Demonstrate a strong understanding of design flow including RTL (VHDL, Verilog, and/or SystemVerilog) - Utilize simulation tools such as Questa or Xcelium and have experience in logic synthesis (e.g. Synopsys DC) - Hands-on experience with embedded mic...

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5.0 - 9.0 years

0 Lacs

hyderabad, telangana

On-site

Are you ready to take the next step in your career and contribute to cutting-edge ASIC and IP/SoC development Join our team in Hyderabad for an exciting opportunity to work on high-impact projects with a talented team in a collaborative and fast-paced environment. **Key Responsibilities:** - Design & Implementation: Specify, micro-architect, implement, and perform design verification for complex RTL IP blocks, from basic SoC building blocks to advanced video processing and encoding/decoding logic. - IP Development Cycle: Participate in the full lifecycle of IP development, from customer concept to backend layout and silicon validation. - Collaboration: Work closely with SoC architects to ens...

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4.0 - 8.0 years

65 - 70 Lacs

bengaluru

Work from Office

Expertise in ASIC RTL Design Expertise in ASIC IP Design Expertise in CDC and Lint tools Expertise in design and simulation tools Expertise in Video processing algorithms / interfaces Expertise in CXL / PCIe Protocol, 5G, Datacenter

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4.0 - 8.0 years

65 - 70 Lacs

bengaluru

Work from Office

Expertise in ASIC RTL Design Expertise in ASIC IP Design Expertise in CDC and Lint tools Expertise in design and simulation tools Expertise in Video processing algorithms / interfaces Expertise in CXL / PCIe Protocol, 5G, Datacenter

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5.0 - 10.0 years

6 - 10 Lacs

bengaluru

Work from Office

What you will do Work on creating verification plan based on the IP design specification Build Standalone IP test bench using System Verilog Develop test cases, coverage model and assertions needed to ensure functional correctness of the Design Under Test (i.e., IP/SOC) Use the IP/SOC RTL in system verilog based logic verification environment & complete the functional verification Generate functional and code coverage metrics, collaborate with IP developers on the correctness & completeness of IP functionality. Deliver the functional test vectors needed to be used for post-silicon validation. Be the single point contact for the concerned IP Verification and enable the Tapeout for all control...

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3.0 - 12.0 years

0 Lacs

karnataka

On-site

As an IP Program Manager at Qualcomm India Private Limited, your role will involve developing, defining, and executing plans of record for IPs delivered to cores and SOCs of multiple business units. You will be responsible for monitoring and driving the program from initiation through delivery, ensuring on-time delivery, budget/spending control, and achievement of program milestones. Your key responsibilities will include: - Establishing day-to-day operational objectives and organizing interdepartmental activities to ensure program completion on schedule - Managing change control and escalations effectively - Assessing program/initiative issues, identifying risks, and collaborating with stak...

Posted 2 months ago

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5.0 - 9.0 years

0 Lacs

hyderabad, telangana

On-site

As the leader in implementing the architecture and design of memory technologies at Ceremorphic AI hardware, your role will involve combining knowledge across various domains such as AI, compilers, computer architecture, analog circuits, and memories. Your responsibilities will include: - Leading the implementation of memory technologies like SRAM, Register Files, ROM generators, etc. - Demonstrating fundamental know-how of bit cell and its characteristics including SNM, WM, Cell current, Standby current, data retention, etc. - Showcasing expertise in process variability and circuit reliability issues affecting power, speed, area, and yield - Having a strong understanding of custom circuit d...

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5.0 - 12.0 years

0 Lacs

karnataka

On-site

As a Senior Analog Designer with 5-12 years of relevant experience in Analog and Mixed Signal Design, you will be responsible for the following: - Designing Low Jitter and high frequency PLLs, including experience with both LC and Ring based PLLs - Handling General Purpose ADC and thermal Sensors IP design - Working on High-speed Serdes Design - Designing LDO, BGR, and other power management blocks The ideal candidate for this role should be prepared for challenging design experiences and exposure to silicon validation. You will have the opportunity to gain full exposure to the IP design cycle in advanced Samsung foundry processes at 4nm and below. Qualifications required for this position i...

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2.0 - 6.0 years

0 Lacs

karnataka

On-site

As a member of the team developing custom silicon solutions for Google's direct-to-consumer products, you will be contributing to innovation and shaping the future of hardware experiences. Your work will be instrumental in delivering high performance, efficiency, and integration in the next generation of Google products. Your key responsibilities will include: - Planning tasks, providing support, conducting code and design reviews, and contributing to sub-system/chip-level integration for both IP design and integration activities. - Collaborating closely with the architecture team to develop implementation strategies meeting quality, schedule, and power performance area for IPs. - Interactin...

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6.0 - 15.0 years

0 Lacs

karnataka

On-site

As an experienced candidate with 6 to 15 years of experience, you will be responsible for the following: - Architecture, Micro-Architecture, Design, and RTL development for storage controller IP's based on UFS, NVMe, SAS, NVMeOF, eMMC, and high-speed peripheral bus standards such as PCIe. - Interfacing with cross-functional teams like Verification, Validation, and FW to ensure seamless collaboration. - Ensuring the quality of design by conducting Lint and CDC checks. - Synthesis, Area, and power optimization to enhance the performance of the storage controllers. - Developing timing constraints (SDC) and ECO scripts to streamline the design process and ensure quality deliverables and reuse. Y...

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8.0 - 12.0 years

0 Lacs

karnataka

On-site

As an RTL ASIC Front End Design Engineer at the company, your responsibilities will include the following: - Developing Microarchitecture and Verilog coding for RTL ASIC design - Working on MAS development, RTL coding, module development, and feature additions - Demonstrating experience in working with medium complexity protocols and proficiency in slow-speed protocols such as I2C, SPI, and UART - Having familiarity with AMBA bus protocols, including APB, AHB, and AXI - Experience in Quality check flows, including lint and CDC For candidates with 8+ years of experience, you are expected to have a strong proficiency in RTL coding. Your role will involve: - Developing microarchitecture - Ownin...

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8.0 - 12.0 years

0 Lacs

karnataka

On-site

As an RTL Engineer and Lead at Tessolve Semiconductors in Bangalore or Hyderabad, your role will involve RTL ASIC front end design with microarchitecture and Verilog coding. Your key responsibilities will include: - MAS development - RTL coding - Development of module and feature addition - Experience in medium complexity protocols - Familiarity with slow speed protocols like I2C, SPI, and UART - Knowledge of AMBA bus protocols (APB, AHB, AXI) - Experience in quality check flows such as linting and CDC For candidates with 8+ years of experience, the expectations will be higher, including: - Very strong RTL coding skills - Micro-architecture (uArch) development - Ownership and delivery of a s...

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10.0 - 14.0 years

0 Lacs

noida, uttar pradesh

On-site

As an Individual Contributor in the IP / SS domain, your role involves driving roadmaps for the complete IP portfolio, focusing on logic design and architecting Complex IPs / Subsystems solutions. You will collaborate with a team of global experts to address design challenges and work on a wide spectrum of skills from high-level specifications to actual design implementation. **Key Responsibilities:** - Own and drive Roadmaps for complete IP / Subsystem domains portfolio within the global R&D team. - Perform benchmarks against industry players to ensure innovative features for customers. - Architect and Design complex IP and Subsystems for Automotive Self Driving Vehicles (ADAS), In-Vehicle ...

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5.0 - 10.0 years

6 - 10 Lacs

bengaluru

Work from Office

What you will do Work on creating verification plan based on the IP design specification Build Standalone IP test bench using System Verilog Develop test cases, coverage model and assertions needed to ensure functional correctness of the Design Under Test (i.e., IP/SOC) Use the IP/SOC RTL in system verilog based logic verification environment & complete the functional verification Generate functional and code coverage metrics, collaborate with IP developers on the correctness & completeness of IP functionality. Deliver the functional test vectors needed to be used for post-silicon validation. Be the single point contact for the concerned IP Verification and enable the Tapeout for all control...

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1.0 - 5.0 years

0 Lacs

karnataka

On-site

Role Overview: As a Hardware Engineer at Qualcomm India Private Limited, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems. Your role will involve working on cutting-edge products across various systems such as Digital, Analog, RF, and optical systems. Collaborating with cross-functional teams, you will develop solutions to meet performance requirements and contribute to the company's mission of enabling next-generation experiences. Key Responsibilities: - Work on memory design with at least 2 years of experience - Develop embedded SRAM/ROM using compiler approach - Possess fundamental knowledge of bit cell characteristics such as SNM, WM,...

Posted 3 months ago

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