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10.0 - 14.0 years
0 Lacs
karnataka
On-site
Role Overview: You will be responsible for understanding the design convergence cycle, including architecture, micro-architecture, verification, synthesis, and timing closure. Your expertise will be crucial in managing IP dependencies, planning front-end design tasks, and designing high-speed serial IO protocols. Additionally, you will need to implement clock rate compensation FIFO, gearbox design for data width, bypass on controller, power gating, and low power modes. Experience in CPU, bus fabrics, or coherence/noncoherent NOC domains will be highly beneficial. Your excellent communication and interpersonal skills will be essential for effective collaboration in a fast-paced, product-orien...
Posted 1 month ago
8.0 - 12.0 years
0 Lacs
karnataka
On-site
You should have at least 8 years of experience in Micro-architecture, SoC development, and full-chip design for multi-million gate SoCs. Your expertise should include a strong understanding of the design convergence cycle, encompassing architecture, micro-architecture, Verification, Synthesis, and timing closure. You should also be adept at managing IP dependencies and planning front-end design tasks effectively. Additionally, you should have experience in designing and developing high-speed serial IO protocols. Your skills should cover the implementation of clock rate compensation FIFO, gearbox design for data width, bypass on controller, power gating, and low power modes. Experience in CPU...
Posted 4 months ago
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