5.0 - 9.0 years

0 Lacs

karnataka

On-site

As a Senior DFT Engineer at Samsung Semiconductor India Research (SSIR), you will play a crucial role in full chip DFT architecture, implementation, timing closure, and post-silicon validation. Your responsibilities will include: - Planning scan architecture and optimization for pattern volume - Performing pin mixing and scan compression planning - Implementing power optimization techniques in test modes - Planning MBIST architecture and insertion - Verifying analog and mixed signal IP testing architecture You will also be responsible for tasks such as timing closure of scan and MBIST, writing SDCs, debugging timing issues, and interpreting tester results. Additionally, you will need to unde...

Posted 1 month ago

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Engineering Sales - Senior Professional- Commissioning Schneider Electric

5.0 - 12.0 years

0 Lacs

chennai, tamil nadu

On-site

As a Commissioning Engineer, you will play a crucial role in our project delivery team by overseeing the testing, inspection, and commissioning of systems and equipment on-site. Your responsibilities will include ensuring all systems meet operational and safety standards, collaborating closely with project managers, design teams, contractors, and clients for a seamless transition from construction to operational readiness. To excel in this role, you will need excellent problem-solving and analytical skills, the ability to interpret technical drawings, P&IDs, and schematics, strong communication and interpersonal skills, and a willingness to travel to project sites and work extended hours as ...

Posted 3 months ago

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DFT Design Engineer - Foundry Team Samsung Electronics

5.0 - 9.0 years

0 Lacs

karnataka

On-site

The position available involves working with Samsung Semiconductor India Research (SSIR), an innovative hub focused on developing cutting-edge semiconductor solutions. As part of one of the largest R&D centers for Samsung Electronics outside Korea, you will have the opportunity to work on advanced technologies in System LSI, Memory, Foundry, and more. Your role will entail collaborating on diverse projects, conducting research in emerging technology areas, and contributing to the development of world-class products. We are seeking a professional with over 5 years of experience in full chip Design for Testability (DFT) architecture, implementation, timing closure, and post-silicon validation....

Posted 3 months ago

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Design Engineer Samsung Electronics

5.0 - 9.0 years

0 Lacs

karnataka

On-site

The position at Samsung Semiconductor India Research (SSIR) requires a Senior DFT Engineer with at least 5 years of experience in full chip DFT architecture, implementation, timing closure, and post-silicon validation. As part of the team, you will be responsible for various key tasks including scan architecture planning, pin mixing, scan compression planning, and optimization for pattern volume for SA and TD pattern sets. Your expertise will be crucial in scan synthesis, power optimization techniques in test modes, MBIST architecture planning, repair architectures, insertion, verification, and analog and mixed signal IP testing architecture and verification. In this role, you will also be i...

Posted 3 months ago

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