IP Micro Architect / RTL Logic Design Lead Intel Corporation

10.0 - 15.0 years

0 Lacs

karnataka

On-site

The DCAI and Silicon Eng Team is responsible for delivering leadership Xeon products to cloud and datacenter customers by developing industry-leading x86 core and differentiated IPs. These IPs enhance product performance and competitiveness in both Xeon and AI platforms. The IP design group within DCAI focuses on designing Coherent Fabric IP, Memory controller, NOC, PCIE, and other fundamental building blocks for Xeon server SOCs. We are currently looking for an experienced Senior Micro Architect to design, develop, and implement advanced Digital IO Controllers such as PCIe/CXL/UCIe systems for next-generation data center and AI chips. This role requires a unique blend of architectural expertise and hands-on RTL coding skills to bring cutting-edge designs to life. The ideal candidate will possess a deep understanding of high-speed IOs like PCIe/CXL/UCIe architecture, interconnect protocols, and coherence mechanisms, along with a proven ability to implement these designs at the RTL level. Key Responsibilities: - Architect scalable memory coherency protocols and interconnect topologies to achieve high performance and low latency for data center and AI SoCs. - Design and implement critical components of the memory fabric microarchitecture, including coherency controllers and interconnect blocks. - Develop RTL code for core components of the memory fabric, ensuring optimal performance, area, and power trade-offs. - Collaborate closely with verification teams to create test plans and debug issues during pre-silicon validation. - Work with cross-functional teams (physical design, software, and firmware) to ensure seamless integration of memory fabric systems. - Analyze system performance, conduct workload modeling, and optimize the architecture for target use cases. - Mentor junior engineers, contribute to technical reviews, and design documentation. - Stay updated with emerging technologies and trends in PCIe/CXL/UCIe protocols, as well as AI/ML hardware. - Demonstrate strong problem-solving and debugging skills. - Exhibit excellent communication and collaboration abilities. - Ability to manage and prioritize multiple tasks effectively. Qualifications: - Bachelor's degree with 15+ years of experience or Master's degree in Electronics and Computer Engineering with relevant experience of at least 10+ years. This is an Experienced Hire job type located in India, Bangalore, within the Design Engineering Group (DEG) at Intel. DEG is committed to developing best-in-class SOCs, Cores, and IPs that power Intel's products. The team focuses on delivering leadership products through the pursuit of Moore's Law and groundbreaking innovations. This role is eligible for a hybrid work model allowing employees to split their time between working on-site at the assigned Intel site and off-site. Please note that job posting details, such as work model, location, or time type, are subject to change.,

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