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ASIC Design For Testability Engineer Google

5.0 - 9.0 years

0 Lacs

karnataka

On-site

Role Overview: You will be responsible for developing Design for Testability/Design for Debugging (DFT/DFD) flows and methodologies. Your main focus will be on developing DFT specifications, DFT architecture, fault modeling, test standards, and industry tools related to DFT/DFD/Automatic Test Pattern Generation (ATPG) for Application-Specific Integrated Circuit (ASIC) DFT, synthesis, simulation, and verification flow. Key Responsibilities: - Develop DFT specifications and DFT architecture - Perform fault modeling and define test standards - Work with industry tools for DFT/DFD/ATPG for ASIC DFT - Collaborate with cross-functional teams including Design for testing (DFT) engineers, RTL Engine...

Posted 1 week ago

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