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3.0 - 7.0 years
0 Lacs
noida, uttar pradesh
On-site
You have been selected for a role as a Lead in SoC Physical Design at a dynamic company, 7Rays Semiconductor Private Ltd. With over 3 years of relevant experience, your expertise in SoC Physical design across multiple technology nodes, including 5nm for TSMC & Other foundries, will be highly valuable. Your responsibilities will include: - Demonstrating excellent hands-on P&R skills with expert knowledge in ICC/Innovus - Utilizing expert knowledge in all aspects of PD from Synthesis to GDSII - Demonstrating a strong background in Floorplanning, Placement, CTS, Routing, P&R, Extraction, IR Drop Analysis, Timing, and Signal Integrity closure - Experience at taping out multiple chips, especially...
Posted 4 days ago
3.0 - 7.0 years
0 Lacs
noida, uttar pradesh
On-site
As an experienced SoC Physical design engineer, you should have a minimum of 3+ years of relevant experience leading SoC Physical design projects across multiple technology nodes, including 5nm for TSMC and other foundries. Your expertise should include hands-on Place and Route (P&R) skills with in-depth knowledge of ICC/Innovus. It is essential that you possess expert knowledge in all phases of Physical Design (PD) from Synthesis to GDSII, with a solid background in Floorplanning, Placement, Clock Tree Synthesis (CTS), Routing, P&R, Extraction, IR Drop Analysis, Timing, and Signal Integrity closure. Experience in taping out multiple chips and strong familiarity with the top level at the lat...
Posted 1 week ago
3.0 - 7.0 years
0 Lacs
noida, uttar pradesh
On-site
You should have at least 3+ years of relevant experience in SoC Physical design, with a focus on multiple technology nodes including 5nm for TSMC and other foundries. Your expertise should include hands-on P&R skills, particularly in ICC/Innovus. You must possess expert knowledge in all aspects of Physical Design (PD) from Synthesis to GDSII, with a strong background in Floorplanning, Placement, CTS, Routing, P&R, Extraction, IR Drop Analysis, Timing, and Signal Integrity closure. - Experience in taping out multiple chips and working at the top level in the latest technology nodes will be highly beneficial. - Collaboration with CAD, Methodology & IP teams for PD implementation is critical, r...
Posted 1 month ago
3.0 - 7.0 years
0 Lacs
noida, uttar pradesh
On-site
You should have at least 3+ years of relevant experience leading SoC Physical design projects across multiple technology nodes, including 5nm for TSMC and other foundries. Your expertise should include hands-on Place and Route (P&R) skills with in-depth knowledge of ICC/Innovus. You must possess expert knowledge in all phases of Physical Design (PD) from Synthesis to GDSII, with a solid background in Floorplanning, Placement, Clock Tree Synthesis (CTS), Routing, P&R, Extraction, IR Drop Analysis, Timing, and Signal Integrity closure. Experience in taping out multiple chips and strong familiarity with the top level at the latest technology nodes will be beneficial. Collaboration with CAD, Met...
Posted 3 months ago
3.0 - 7.0 years
0 Lacs
noida, uttar pradesh
On-site
You should have at least 3+ years of relevant experience in SoC Physical design, with a focus on multiple technology nodes including 5nm for TSMC and other foundries. Your expertise should include hands-on P&R skills, particularly in ICC/Innovus. You must possess expert knowledge in all aspects of Physical Design (PD) from Synthesis to GDSII, with a strong background in Floorplanning, Placement, CTS, Routing, P&R, Extraction, IR Drop Analysis, Timing, and Signal Integrity closure. Experience in taping out multiple chips and working at the top level in the latest technology nodes will be highly beneficial. Collaboration with CAD, Methodology & IP teams for PD implementation is critical, requi...
Posted 3 months ago
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