202 Icc Jobs - Page 9

Description of Role: Reporting to the NA Cash & Trade Processing Senior Group Manager, this position will provide North America Trade Operations with technical expertise and guidance, with regards to guidelines issued by International Chamber of Commerce (UCP / ISP/URR/ URDG etc.), and provide solutions to address any risk situation by referring to previous court cases, as applicable, and by coordinating / discussing with various banking committees. This position will also requires the candidate to work remotely with our Operations, Legal and business partners Globally across multiple countries and provide trainings as required with regards to the Trade Business and applicable rules, guidelines, policies and market best practices. Key Competencies / Responsibilities: Thorough knowledge of ICC Rules (ISP98, URDG758, UCP600, URR 725, ISDG, eUCP, URC 522 ISBP 745) and familiarity with ICC Opinions and DOCDEX;Ability to structure/review complex Commercial Letters of Credit and SBLCs;Experience with Government agency SBLCs; Insurance SBLCs, specialty products like guarantees program for IFC, Exim Bank, direct pay Letters of Credit for enhancement of bonds, and Trade finance through LCs;Well acquainted with sound banking practices promulgated by Office of Comptroller of Currencies;Readiness and capable to represents Citibank, N.A. at various domestic and international forums for Letters of CreditFamiliarity, from operational perspective, with LC Section in Syndicated Credit Agreement;Familiarity, from operational perspective, with Letter of Credit law in USA – Uniform Commercial Code Article 5;Experience working close and in collaboration with business, risk, compliance and trade legal;Experienced in international banking practices for Commercial Letter of Credit and Standbys Letters of Credit and independent demand letter of Guarantee;Familiarity with OFAC, AML, and U.S. Federal regulatory regulations;Has in-depth knowledge of the multi-billion Dollar Trade Operations business environment;Strong interpersonal and communication skills with the demonstrated ability to lead transparently at an advanced level;Strong project, analytical, and investigations skills;Proven ability to present complex ideas, negotiate and influence senior leaders across diverse functions;Highly organized and able to manage resources and delegate workflow;Successful track record leading projects and delivering superior results;Ability to work remotely in a team environment;Recognized as a change leader;Strong problem solving skills and demonstrated ability to resolve issues that have impact beyond one’s own area;Proven strong people management skills;Proven accountability and ownership of E2E processes and programs;Best practice sharing within the region and countries.Liaises with multiple Operations teams to ensure a quality product is delivered to external and internal corporate and FI customers; Serves as analytical and/or procedural expert representing the unit on cross-functional operational project deliverables;Resolves complex problems where analysis of situations or data requires an in-depth evaluation of basic customer requirements, operations and business processes;Leads interaction with Global and Regional Product Heads. Experience Required Fluent in English written and spoken, Bilingual preferred (Spanish or French);10+ years’ experience in Trade Document Checking or Trade Advisory role;Certified Credit Documentary Specialist (CDCS) is a must;Experience in working with Legal, Technology, AML, Credit, Sanctions, Finance and Treasury;Bachelor’s degree, preferable Master Degree in Finance, Business;Excellent written and verbal communication skills;Advanced Skills in MS Office ------------------------------------------------------ Job Family Group: Operations - Transaction Services ------------------------------------------------------ Job Family: Cash Management ------------------------------------------------------ Time Type: Full time ------------------------------------------------------ Citi is an equal opportunity and affirmative action employer. Qualified applicants will receive consideration without regard to their race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran. Citigroup Inc. and its subsidiaries ("Citi”) invite all qualified interested applicants to apply for career opportunities. If you are a person with a disability and need a reasonable accommodation to use our search tools and/or apply for a career opportunity review Accessibility at Citi. View the "EEO is the Law" poster. View the EEO is the Law Supplement. View the EEO Policy Statement. View the Pay Transparency Posting

Role Description Role Proficiency: Execute any internal project or small tasks of customer project in any field of VLSI Frontend Backend or Analog design under minimal supervison from the Lead Outcomes As an Individual contributor work on any one task of RTL Design/Module in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks/Signoff etc. Analyse and complete the assigned task in the defined domain(s) successfully on-time with minimal support from senior engineersEnsure quality delivery as approved by the senior engineer or project lead Measures Of Outcomes Quality –verified using relevant metrics by Lead/Manager Timely delivery - verified using relevant metrics by Lead/Manager Reduction in cycle time and cost using innovative approaches Number of trainings attended Outputs Expected Quality of the deliverables: Clean delivery of the module in-terms of ease in integration at the top levelEnsure functional spec / design guidelines are met 100% of the time without deviation or limitationDocumentation of the tasks and work performed Timely Delivery Meet project timelines as given by the team lead/program managerHelp with intermediate tasks delivery by other team members to ensure progress Teamwork Teamwork participation; supporting team members in the time of needAble to perform additional tasks in case of any team member(s) is not available Innovation & Creativity Pro-actively plan approach towards repeated work by automating tasks to save design cycle timeParticipation in technical discussion training forum Skill Examples Languages and Programming skills:a. System Verilog Verilog VHDL UVM C C++ Assembly Perl TCL/TK Makefile Spice (any one) EDA Tools: a. Cadence Synopsys Mentor tool sets (one or more)b. Simulators Lint CDC/RDC DC/RTL-C ICC/Innovus/Olympus ETS/TK/FS PT/Tempus Calibre etc. (any one) Technical Knowledge: (any one)a. Understands IP Spec Architecture Design Micro Architecture Functional Spec Test Plan Verificationb. Knows Bus Protocol AHB/AXI/PCIe/USB/Ethernet/SPI/I2C Microprocessor architecturec. Good knowledge of Physical Design / Circuit Design / Analog Layout d. Good understanding of Synthesis DFT Floorplan Clocks P&R STA Extraction Physical Verificatione. Knowledge in Soft / Hard / Mixed Signal IP Design Processor Hardening FPGA Design Technology: CMOS FinFet FDSOI - 28nm / 22nm / 16ff / 10nm and below Required technical skills and prior design knowledge to execute assigned tasks Ability to learn new skills in case required technical skills are not present to a level needed to execute the project Able to deliver tasks with quality and 100% on-time per quality guidelines and GANTT Strong communication skillsGood analytical reasoning and problem-solving skills with attention to detail Knowledge Examples Previous project experience in any of the design by executing any one of the following RTL Design / Verification / DFT / Physical Design / STA / PV / Circuit Design / Analog Layout etc. Good Understanding of the design flow and methodologies used in designing Understand the assigned tasks and have sufficient knowledge to execute the project tasks assigned by the client / manager per skill set Additional Comments Required Primary Key skills – STA, nano time Job Description: You will be part of a Physical Design / Timing Closure team for projects with GHz freq range and cutting-edge technologies. You will develop timing constraints for full chip or block level and be responsible for STA signoff for a complex multi-clock, multi-voltage SoCs. You will be responsible for Synthesis, Timing Analysis (STA), CTS at Full Chip or block level for Lower tech node ( Below 14nm) Desired Skills and Experience: B. Tech. / M. Tech. with 2-8 years of experience in Synthesis, STA Expertise in synthesis of complex SoCs at block/top level and writing timing constraints for complex designs with multiple clocks and multiple voltage domains Worked on pre and post layout timing analysis and resolving the issues Expertise on post layout timing closure for multiple tape outs, including timing ECOs and STA signoff Expertise in I/O constraints developments for Industry standard protocols (e.g. DDR1/2/3, SDR, LPDDR, Flash, SPIs, Ethernet, USBHS, USBFS, JTAG, Display etc...) Hands-on experience of working on technology nodes like 28nm, 20nm, 14nm, 10nmGood knowledge of EDA tools from RC, DC, PT, PTSI Experience in formal verification RTL-to-netlist and netlist-to-netlist with DFT constraints Good knowledge of VLSI process and device characteristics Good understanding of deep submicron parasitic effects, crosstalk effects etc.TCL, perl scripting Skills Vlsi,Tlc,Perl