4 Hwsw Integration Jobs

Role Overview: In an increasingly connected world, the pandemic has highlighted just how essential telecom networks are to keeping society running. The Network Infrastructure group is at the heart of a revolution to connectivity, pushing the boundaries to deliver more and faster network capacity to people worldwide through our ambition, innovation, and technical expertise. Join Optical Networks division, where innovation meets scale in the AI-driven data center era. With the recent acquisition of Infinera, weve united two industry leaders to create an optical networking powerhouse combining cutting-edge technology with proven leadership to redefine the future of connectivity. Infinera is now part of the Nokia Corporation and its subsidiaries. When you apply, the information you share will be handled with care and used only for recruitment purposes within the group. Key Responsibility: - Breakdown of requirements to formulate work packages. - Sound software architecture experience and assist in Designing, Development and Integration of software for Infinera's next-gen products. - Participate in System design reviews and readouts, High-level design of various software modules, Critical code reviews. - Hands-on coding experience in C++/Advanced C++, Python and should be capable of designing and implementing a PoC for any new software framework envisaged for a product. - Explore state-of-the-art AI tools for continuous integration pipelines and automation. - Debug along with hardware and software engineers. Qualification Required: - Candidates must have a Bachelor's degree or higher in CS, Opto-Electronics, ECE, or equivalent branch of engineering, with very good academics. - Experience in using dockers in development/simulation environment. - Experience in using Modern Automated tools, viz. Codescene, GTEST. - Exposure to AI-based tools viz. Copilot, Tabnine, Cursor, etc. - Experience in one of the technologies such as SDH/SONET, OTN, DWDM is a plus. - Domain Knowledge of Transponders is an added plus. - Experience of 15+ years within SW development. - Experience of 4+ years as a Software Architect for an Optical Line System Product. - Working experience in Optical technologies and architecture involving ROADM, Amplifiers, RAMAN, Optical Channel Monitor, VOA. - Excellent C/C++/Python and object-oriented programming skills in multi-threaded environments. - Excellent design analysis skills, including experience with software modeling, reuse, performance, testability, and extensibility. - Experience in HW-SW integration. - Flexible and Highly Innovative. - Structured and thorough with analytical and troubleshooting skills. - Highly motivated team player. - Agile way of working. - English, written and spoken. - Leadership quality - Must have experience in leading a team of 3-5 engineers for completing a task end-to-end.,

You should have experience working with USRP N310/X310 (N3xx/X3x0) and possess a deep understanding of FPGA Architecture. Additionally, you must be proficient in writing your own RTL custom HDL or integrating IP components, including VHDL, Verilog, System Verilog, Vivado HLS, Xilinx IP, and Vivado Block Diagram. It is essential that you have developed RFNoC Blocks and have a good grasp of the USRP Hardware Driver (UHD). Your responsibilities will include creating custom FPGA logic in RFNoC Blocks, utilizing existing RFNoC Blocks library, and understanding the GNU Radio interface to RFNoC Block. Furthermore, you will be involved in FPGA debugging, hardware/software integration, and implementing appropriate coding styles for FPGAs while considering density and speed trade-offs. A thorough knowledge of XILINX ZYNQ 71xx/PL-KINTEX-7 based RFNoC architecture is crucial for this role. You will also be required to comprehend customer requirements, define architecture, and develop detailed designs. Strong communication skills and familiarity with Agile methodology are necessary for effective interaction with customers. In addition to the technical skills, the ideal candidate should hold a Bachelor's degree in Engineering or Technology (B.E./B.Tech.). Please note that we are accommodating a notice period of up to 30 days for this position.,

You should have a minimum of 6-8 years of total work experience with specific expertise in the following areas: - Experience working with USRP N310/X310 (N3xx/X3x0) - In-depth knowledge of FPGA Architecture - Proficiency in writing custom RTL HDL or integrating IP, including VHDL, Verilog, SystemVerilog, Vivado HLS, Xilinx IP, and Vivado Block Diagram - Development experience with RFNoC Blocks - Familiarity with USRP Hardware Driver (UHD) - Ability to write custom FPGA logic in RFNoC Blocks and utilize existing RFNoC Blocks library (e.g., FFT, FIR, Signal Generator, Fosphor) - Understanding of the GNU Radio interface to RFNoC Block - Skills in FPGA debugging and hardware/software integration - Knowledge of appropriate coding styles for FPGAs and trade-offs for density and speed - Thorough understanding of Xilinx ZYNQ 71xx/PL-KINTEX-7-based RFNoC architecture - Capability to comprehend customer requirements, define architecture, and create detailed designs - Strong communication skills to interact effectively with customers - Familiarity with Agile methodology - Bachelor of Engineering or Bachelor of Technology degree (B.E./B.Tech.) This is a full-time, permanent position with a day shift schedule. The role requires individuals with a notice period of up to 30 days. The work location is in person. If you meet the specified qualifications and experience requirements, please apply for this role.,

You are a senior FPGA expert with over a decade of experience in architecting, implementing, and optimizing complex digital systems. Your role will involve owning the design and delivery of mission-critical FPGA-based solutions. You will be responsible for the architecture, design, and implementation of complex FPGAs (Xilinx/Intel), as well as defining and driving system-level hardware architecture in collaboration with cross-functional teams. Additionally, you will lead timing closure, constraint management, and interface integration (PCIe, DDR, high-speed serial), while optimizing performance, power, and resource utilization. Your role will also include providing technical leadership, conducting peer reviews, and mentoring junior engineers. To be successful in this role, you should have 10+ years of hands-on FPGA design experience, deep expertise in Verilog/VHDL/SystemVerilog, and a strong track record of successful tape-outs/productization. Proficiency with tools such as Vivado, Quartus, Synplify, ModelSim, or similar is required. Familiarity with embedded systems, SoCs, or HW/SW integration is considered a plus. The ideal candidate is a self-starter who excels at solving challenging problems, shaping architecture, and delivering production-quality hardware. In this role, you will have the opportunity to work on innovative, performance-critical systems, while enjoying autonomy, ownership, and a voice in architecture decisions. If you are interested or know someone who fits this description, please apply by sending your details to himabindu.jeevarathnam@acldigital.com.,