Staff Engineer - Memory Design Validation Vmware

4.0 - 9.0 years

5 - 6 Lacs

bengaluru, karnataka, india

On-site

Job Description Contribute/Lead towards Memory Design Validation of all types of custom memory macros and memory compilers Perform functional verification, root cause design discrepancies, and help resolve them Perform signal integrity analysis, identify design weaknesses, and propose possible solutions to address them Perform transistor level simulations to check for any Power Up or Lock up issues and help resolve them Perform EM/IR analysis/simulations and evaluate impact on timing and internal margins Perform transistor level simulations to validate timing and internal margins, identify timing characterization holes, and help resolve them Perform various QA and validation checks to ensure...

Posted 1 month ago

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Senior Engineer - Standard Cell Design Micron Technology

3.0 - 5.0 years

0 Lacs

hyderabad, telangana, india

On-site

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities Design and maintain standard cells for new DRAM products on new technology Closely collaborate with DTCO team to develop?stdcells?architecture for emerging technologies Characterization and modeling of Standard cells to provide timing/power model Quality Analysis of characterized liberty models in terms of performance, Power and Functionality Develop automation test bench/flow/...

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Memory Design Compiler UST

5.0 - 9.0 years

0 Lacs

karnataka

On-site

You will be contributing/leading towards the design and development of Single/Multiport SRAM, Register file compilers in various technologies ranging from 28nm to 2FF. Your responsibilities will include: - Circuit design/simulation of key components such as bitcell, WL decoder, SAMP, Column decoder, and control logic. - Development of critical path and characterization flow for detailed margin and characterization simulations. - Statistical Analysis of Bit-Cell, Sense Amplifier, and Self Time Blocks for Compiler Target yield Sign-Off. - Design Tuning/optimizations to meet target PPA, Margin Analysis and Sign-Off for Complete Compiler to meet Yield and Performance targets. - Logic simulations...

Posted 2 months ago

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Senior Engineer - Characterization Micron Semiconductor Asia Operations Pte. Ltd

3.0 - 5.0 years

0 Lacs

hyderabad, telangana, india

On-site

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Characterization Engineer, you will work with a highly innovative and motivated design team using state of the art memory technologies to develop the most advanced DRAM and Emerging memory products. You will be challenged by the complexity and difficulty of verifying high density memory chips with huge scale of circuit capability, ultra-high-speed designs, complex functionality which inclu...

Posted 2 months ago

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Principle Engineer - Standard Cell Design CONNECT-PRO MANAGEMENT CONSULTANTS

4.0 - 7.0 years

6 - 9 Lacs

Hyderabad

Work from Office

Responsibilities Design and maintain standard cells for new products based on new technology. Characterize the performance of standard cells and optimize the standard cell design and layout. Characterization and modeling of Standard Cell and semi-Custom cells to provide timing/power model for verification. Quality Analysis of characterized liberty models in terms of Timing, Power and Functionality. Closely collaborate with DTCO team to work on stdcells architecture for emerging technologies. Develop automation test bench/flow/tools to improve the work efficiency and help data analysis. Co-work with international colleagues on developing new verification flows to take on the challenges in DRA...

Posted 6 months ago

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