Senior Analog and Mixed Signal Layout Engineer ACL Digital

5.0 - 9.0 years

0 Lacs

karnataka

On-site

You have experience in Mixed-Signal layouts and must have worked with TSMC 7nm / 5nm FINFET technology. It is also preferred that you have knowledge of keywords like 22FDX / 12FDX / FDSOI. Your responsibilities will include working on various Mixed-Signal layout blocks such as: - High-speed SerDes like Transmitter(Tx), Receiver(Rx), PLL, USR, LNA, etc. - Analog-to-Digital Converters (ADCs) such as Successive Approximation (SAR) ADC, Delta-sigma () ADC, Dual Slope ADC, Pipelined ADC, Flash ADC. - Digital-to Analog Converters (DACs) including Weighted Resistor DAC, R-2R Ladder DAC. - GPIO, XTAL, Auxiliary cells. - High-speed IOs like DDR2/3/4, MIPI, SATA, USB, LVDS, etc. You should have hands-...

Posted 4 days ago

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Design Engineer II Cadence

2.0 - 8.0 years

0 Lacs

hyderabad, telangana

On-site

As an Analog Circuit Design professional at Cadence, you will play a critical role in shaping the world of technology. With 2+ to 8 years of experience, your expertise will be utilized in our Hyderabad office. Your educational background should include a BE/B Tech/ME/M Tech/MS degree, and a deep understanding of high-speed Serdes/Memory interface circuits such as I/Os, PLLs, Clocking, and Datapaths is essential. Your hands-on experience with PCIe Gen3/4/5/6, GDDRx/DDRx/LPDDRx memory interface circuits will be highly valued. Proficiency in Analog Design, I/O Design fundamentals, and knowledge of ESD/Reliability/SI/PI is crucial. You will be expected to lead complex IPs, manage cross-functiona...

Posted 3 weeks ago

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Senior Analog Design Engineer Akshaya Business IT solutions Pvt Ltd

10.0 - 14.0 years

0 Lacs

hyderabad, telangana

On-site

You should have a minimum of 10-14 years of experience along with a strong educational background in BE/ B Tech/ ME/ M Tech / MS. Your responsibilities will include an in-depth understanding and hands-on experience in high-speed Serdes/Memory interface circuits such as I/Os, PLLs, Clocking, Datapaths, PCIe Gen3/4/5/6, GDDRx/DDRx/LPDDRx memory interface circuits. It is essential to have exposure to high-speed analog circuit design, high-speed Tx-Rx designs, and high-speed Phy architecture. Additionally, you should possess strong Analog Design and I/O Design fundamentals with knowledge of ESD/Reliability/SI/PI. You will be required to lead complex IPs, manage cross-functional dependencies, and...

Posted 2 months ago

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