371 Hardware Engineering Jobs - Page 5

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Bachelors /Masters degree in Engineering Relevant experience of 6+yrs in any of the mentioned domain - Verification/ Emulation/ Validation Verification: Strong knowledge of digital design and SOC architecture. Good understanding of OOP concepts Experience in HVL such as System Verilog, UVM/OVM & System C Experience in HDL such as Verilog Knowledge of ARM/DSP CPU architecture, High Speed Peripherals like USB2/3, PCIE or Audio/Multimedia Familiarity with Power-aware Verification, GLS, Test vector generation is a plus Exposure to Version managers like Clearcase/perforce FPGA Emulation : Familiarity with Verilog/Vhdl and General Digital Logic Design concepts Knowledge of system-level architecture including buses like ARM processor bringup, AXI/AHB, bridges, memory controllers such as DDR/Nand. Knowledge of peripheral emulation like PCIE/USB is a plus. Strong working knowledge of UNIX environment and scripting languages such as Perl or shell Working knowledge XILINX Virtex FPGA architecture and experience with ISE tool flow Pre/Post silicon Validation: ARM based System-On-Chip Pre-Silicon emulation and Post-Silicon ASIC Validation experience related to board bring up and debug. Perform system level validation and debug Debug experience with Lauterbach Trace32 environment. Test equipment like Logic analyzer, Oscilloscope and Protocol analyzers. Embedded software development of low level hardware drivers in C language. Working experience related to one or more of the following is required. ARM/DSP Processors/USB/PCIE, Ethernet Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Experience in Logic design /micro-architecture / RTL coding is a must. Must have hands on experience with SoC design and integration for complex SoCs. Experience in Verilog/System-Verilog is a must. Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in constraint development and timing closure Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Experience in Synthesis / Understanding of timing concepts for ASIC is required. Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience creating pad ring and working with the chip level floorplan team is an added advantage Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required . Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Preferred Qualifications 2-9 years of experience in SoC design Educational 2+ years of experience with a Bachelors/ Masters degree in Electrical engineering

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Qualcomm Noida CPU team is hiring for developing high performance and power optimized custom CPU cores. Individuals to Handle hardening complex HMs from RTL to GDS [ Synthesis, PNR, Timing ]. We are excited to add folks with us for the most cutting-edge work. Here, individuals would have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability. We offer a fun, creative and flexible work environment, with a shared vision to build products to change the world. Desired experience: 5+ years experience in physical verification post BTECH / MTECH. Expertise in DRC, LVS, PERC, ERC, SOFTCHECK, DFM etc. Efficient fixing of DRCs in INNOVUS OR FC. Completely aware about CALIBRE , VIRTUSO Good scripting skills and automation.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. As a CPU Physical Design Methodology Engineer, you will work with implementation and CAD teams to implement the designs meeting aggressive power, area and performance goals using industry standard tools/flows for next generation CPUs. : Bachelor's/Masters degree in Electrical Engineering with 5+ years of practical experience Experience with Synthesis, place and route and signoff timing/power analysis. Knowledge of high performance and low power implementation techniques Proficiency in scripting (TCL, Python, Perl) Preferred qualifications Experience in deep submicron process technology nodes is strongly preferred. Knowledge of library cells and optimizations. Solid understanding industry standard tools for synthesis, place & route and tapeout flows. Good data analytical skills to identify and root cause physical design issues. Roles and Responsibilities Work with cross functional teams (RTL, Physical design, Circuits, CAD) to solve key physical design problems in CPU implementations. Develop innovative techniques in Physical design and optimization space to help meet aggressive PPA targets. Work with all external CAD tool vendors and internal CAD teams to identify and improve optimization issues related to CPU designs. Work with all block level implementation teams to analyze, implement and improve the optimization method as it pertains to the designs.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 3+ Years of Experience in Logic design /micro-architecture / RTL coding Must have hands on experience with SoC design, synthesis and timing analysis for complex SoCs. Experience in Verilog/System-Verilog is a must. knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Work closely with the SoC DFT, Physical Design and STA teams Hands on experience in Low power SoC design is required Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience in using the tools in ASIC development such as DesignCompiler, Genus, FusionCompiler and Primetime is required. Understanding of constraint development and timing closure is a plus. Experience in Synthesis / Understanding of timing concepts

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a "CPU Core Validation Engineer" you would be part of CPU Validation team in CPU org working on validation of CPU core pipeline arch and micro arch features. Roles and Responsibilities Develop detailed test plan considering the IP arch and uarch features. Work with CPU design and verification teams to develop CPU bring up and functional validation test plans for the IP owned. Develop validation methodology and test contents to exercise on emulators during pre-Si phase and on Silicon.Work with SOC bring up teams, software teams to plan CPU core features bringup and end to end validation. Triage and debug failures on Silicon. Develop test contents and testing strategies to assist validation of CPU on silicon. Work with CPU verification teams to reproduce silicon fails on emulators and FPGAs. Work with design team to suggest, architect new debug features to improve future CPU bringups. Minimum BA/BS degree in CS/EE with 5+ years experience. 3+ Experience in Silicon Validation and bring up. Implementation of assembly, C/C++ language embedded firmware Experience with software tool chain including assemblers, C compilers, Makefiles, and source code control tools.Preferred Good understanding of micro-processor architecture, in domains such asCache Coherence, Memory ordering and Consistency, Prefetching, Branch Prediction, Renaming, Speculative execution, and Address Translation/Memory Management.Knowledge of Random Instruction Sequencing (RIS) and testing a given design, at the Block/Unit-level and Subsystem/Chip-level for proving correctness.Experience in writing Test plans and Assembly code.Ability to develop and work independently on a block/unit of the design. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Qualifications: Bachelors or Masters degree from a top-tier institute. 6-11 years of experience in physical design from product-based companies. Experience: Proven experience in managing complex subsystems and small teams. Proficiency in synthesis, place and route (PnR), and sign-off convergence, including Static Timing Analysis (STA) and sign-off optimizations. Job : Expertise in meeting demanding Power, Performance, and Area (PPA) requirements for complex subsystems/System on Chips (SoCs), place and route, and IP integration. Experience in low power design implementation, including Unified Power Format (UPF), multi-voltage domains, and power gating. Familiarity with ASIC design flows and physical design methodologies. Strong understanding of circuit design, device physics, and deep sub-micron technology. Experience working on multiple technology nodes in advanced processes. Proficiency in automation to drive improvements in PPA.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: We are hiring talented engineers for CPU RTL development targeted for high performance, low power devices. In this role, you will work with chip architects to conceive of the micro-architecture, and also help with architecture/product definition through early involvement in the product life-cycle. As an RTL engineer you will own or participate in the following: — Performance exploration. Explore high performance strategies working with the CPU modeling team. — Microarchitecture development and specification. From early high-level architectural exploration, through micro architectural research and arriving at a detailed specification. — RTL ownership. Development, assessment and refinement of RTL design to target power, performance, area and timing goals. — Functional verification support. Help the design verification team execute on the functional verification strategy. — Performance verification support. Help verify that the RTL design meets the performance goals. — Design delivery. Work with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability and power. Skillset looking for: — Thorough knowledge of microprocessor architecture including expertise in one or more of the following areasActive power management (DVFS) , Idle power management , Limit management (TDP, Thermal and Over-current protection), Clock management, Debug and Trace architecture. — Knowledge of Verilog and/or VHDL. Experience with simulators and waveform debugging tools. — Knowledge of logic design principles along with timing and power implications. Additional Additional MS degree in Computer or Electrical Engineering. — Understanding of low power microarchitecture techniques. — Understanding of high performance techniques and trade-offs in a CPU microarchitecture. — Experience using a scripting language such as Perl or Python. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Job Role Work on Logic & Physical aware Synthesis with Low Power, QoR optimization, STA and Netlist Signoff flows. Work on Logic equivalence check and low power check clean up. Work on constraints development by interacting with designers and help in porting constraints from block to top-level. Should be able to handle multiple projects by leading a team of 3 to 5 members and deliver. Should be able to lead implementation flow development effort independently by working closely with design team and EDA vendors. Should be able to drive new tool evaluation, methodology refinement for PPA optimization. Should be sincere, dedicated and willing to take up new challenges. Skill Set Proficiency in Python/Tcl. Familiar with Synthesis & STA tools (Fusion Compiler/Genus, Primetime/Tempus). Fair knowledge in LEC, LP signoff tools. Proficient in VLSI front end design steps- Verilog/VHDL, Synthesis, QoR optimization & Equivalence Checking Familiarity with standard software engineering practices like Version Control, Configuration Management.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm WLAN HW team in Bangalore is responsible for developing and delivering best in class WLAN/WiFi solutions which are setting benchmark in wireless industry. In this role of WLAN Verification Engineer, you will be verifying the PHY Sub-System from both TX and RX perspective. The responsibilities will majorly include : Understanding of WLAN PHY TX and RX design paths, Algorithms that control the various aspects of wireless systems Develop test plan to verify WiFi Standards including 11BE, sequences and design components. Own end to end DV tasks from coding Test bench and test cases, write assertions, running simulations and achieving all coverage goals Explore innovative DV methodologies (formal, simulation and emulation based) to continuously push the quality and efficiency of test benches Successful candidate will be required to collaborate with worldwide design, silicon, and architecture teams to achieve all project goals. Hence, we are looking for candidates with strong communication skills. 8+ years industry experience with below skillset : Strong System Verilog/UVM based verification skills & experience with assertion & coverage-based verification methodology Experience in formal / static verification methodologies will be a plus Good understanding of WiFi Standards is a plus Experience with GLS, and scripting languages such as Perl, Python is a plus Education BE/BTech/ME/MTech/MS Communication Engineering and/or Electronics, VLSI from reputed university preferably with distinction Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Additional Qualcomm Global CAD Organization is looking for DFT/ATPG Methodology development lead to develop DFTCAD methodologies for Qualcomms 5G products in advanced FinFET semiconductor process nodes. In this role, you will be a member of a global technical team working with SOC Design, DFT, Product and Test, and Diagnostics teams, as well as EDA Tool vendors to develop world-class DFT methodology solutions. Key Responsibilities Lead DFT ATPG flow development, integration, and deployment efforts independently, collaborating with DFT teams, EDA vendors Drive new ATPG methodology, new tool evaluation, design DoEs, both within Qualcomm and partnering with EDA vendors. Develop optimized recipes for improving test quality, reducing test cost, DFT cycle time, pattern simulation runtimes. Qualifications/Experience BE/B.Tech, ME/MTech/MS in Electrical/Electronics/Computer science Engineering 4-6 years demonstrated experience in VLSI EDA/CAD methodology development in areas of DFT, Scan/ATPG Skills Required Strong knowledge of DFT domain specifically on Scan, ATPG and ATPG pattern simulations Strong development skills in TCL, Python Good understanding of SOC DFT Flow, ATE Flow and practices. Familiarity with standard software development process, systems including Configuration Management, QA, Release and Support Ability to plan and execute formal projects, deliverables. Ability to work with multiple WW teams in a fast paced and dynamic environment. Must be a team player, ability to multi-task, with attention to details. Keywords : DFT, ATPG, Scan, VLSI Test, Tessent, TetraMAX, TestMAX, MBIST, SMS

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Bachelors or Masters degree from a top-tier institute. 3 to 10 years of experience in physical design from product-based companies with some leadership experience. Experience: Proven experience in managing complex subsystems and small teams. Proficiency in synthesis, place and route (PnR), and sign-off convergence, including Static Timing Analysis (STA) and sign-off optimizations. Job : Expertise in meeting demanding Power, Performance, and Area (PPA) requirements for complex subsystems/System on Chips (SoCs), place and route, and IP integration. Experience in low power design implementation, including Unified Power Format (UPF), multi-voltage domains, and power gating. Familiarity with ASIC design flows and physical design methodologies. Strong understanding of circuit design, device physics, and deep sub-micron technology. Experience working on multiple technology nodes in advanced processes. Proficiency in automation to drive improvements in PPA.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 3 to 5 years of experience in static timing analysis, constraints and other physical implementation aspects. Solid understanding industry standard tools PT, Tempus, And should be familliar to PNR tools like Innovus/FC Solid grip on STA fixing aspects to solve extreme critical timing and clock path analysis Should have experienced about preparing complex ECOs for timing convergence [ across huge set of corners] through Tweaker / Tempus / Physical PT ECOs and manual ECOs as well. Experience in deep submicron process technology nodes is strongly preferred - Below 10nm Knowledge of high performance and low power interface timing is added benefit. Strong fundamentals on basic VLSI design concepts, synchronous design timing checks, understanding of constraints Good experience with in Unix, TCL, PT-TCL, Tempus-TCL scripting Familiarity with Python background is added bonus

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. As a design verification engineer you will work with a fast paced Integrated Wireless Technology (IEEE 802.11) team, with various wireless technologies embedded into an ARM based SOC infrastructure. You will be responsible for developing HW blocks (IP design), conduct High/Mid/Low level Design review and delivery IP to Subsystem team for making complex SoCs. You will be a critical part of the WLAN subsystem, contribute to IP design, sign-off the core to the SOC design team. Skills/Experience: - 6-15 years experience in Digital Design with a leading chipset company - Decent knowledge in Wireless connectivity technologiesIEEE 802.11 a/b/g/n/ac/ax/be - Knowledge in SoC architecture, including CPUs (preferably ARM), communications peripherals, multi-domain clocking, bus & interconnect structures, and power management - Strong fundamentals in one or few of these domain areas - Wireless and Mobile communications, Information theory, Coding theory, Signal processing - Strong knowledge on fixed-point implementation Truncation/Rounding/Saturation concepts - Strong knowledge on Digital communication engines viz., Demodulator, Deinterleaver, Viterbi/Turbo Decoders, Sigma-Delta modulation, Base band filters, FFT etc.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age and this is where you come in. Join QCOM Technologies Inc Global Emulation(Prototyping) team delivering solutions for design of leading-edge wireless products. Qualcomm is leading 5G innovations ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. The Qualcomm Global emulation team is currently seeking a lead engineer role for our team doing development/validation of large scale FPGA emulation tools/flows/methodologies In this role, you will be working in multiple areas of SoC/IP prototyping flows and methodologies. Would also involve enabling execution teams doing SOC prototyping during their usage of the platform Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 4-7 years of experience working in FPGA Synthesis, Prototyping of SoCs & IPs Candidates are expected to have experience in: Prior work experience on Emulation/Prototyping Platforms (HAPS, VPS, Protium etc) Multi-FPGA prototyping flow, from RTL preparation to h/w implementation Proficient in analysis & debug of issue in Synthesis, Place and Route, Timing closure, Clocking. Hands on experience in FPGA h/w debug using probes/ILA Proficient in EDA tools like - Vivado, Synplify, Protocompiler, VPS, VCS/Verdi etc RTL coding and simulation Well versed with working in unix/linux environment, using GVIM/VI editors, shell scripting Strong debug skills, aptitude to learn and resolve complex issues Experience in one or more scripting language - TCL, Python, Perl, Shell etc Sound knowledge of: FPGA architecture preferably Xilinx (ultrascale), Vivado IP catalog Synthesis, Timing concepts and SDC constraints Prototyping concepts like - partitioning, pinmux

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm is hiring strong DV engineers to verify high performance and low power CPUs in Bangalore. Please forward your profiles if you meet the requirement. Roles and Responsibilities o Responsible for power management verification includes Boot, Reset, clock gating, power gating, Voltage/frequency management, limit management and throttling. o Work closely with design/verification teams within CPU to develop comprehensive test plan. o Use simulation and formal verification methodologies to execute test plans. Write checkers, assertions and develop stimulus. o Verify power intent through use of methodologies like UPF. o Work closely with system architects, software teams and Soc team to validate system use cases. o Work closely with emulation team to enable verification on emulators and FPGA platforms. o Debug and triage failures in simulation, emulation and/or Silicon. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. o BE/BTech degree in CS/EE with 3+ years experience. o Experience in power management verification. o Implementation of assembly and C language embedded firmware. o Experience in C/C++, scripting languages, Verilog/system Verilog. o Strong understanding of power management features in CPUs and CPU based Socs. o Experience in verification of power management features such as clock gating, power gating, UPF, DVFS/DCVS, reliability, throttling etc. Preferred : o Good Understanding of CPU architectures and CPU micro-architectures. o In-depth knowledge of digital logic design, micro-processor, debug feature, and DFT architecture and microarchitecture o Experience with advanced verification techniques such as formal and assertions is a plus o Knowledge and verification experience in DFT and structural debug concepts and methodologiesJTAG, IEEE1500, MBIST, scan dump, memory dump is a plus

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Required Qualifications Bachelor's degree /masters degree in Electronics & Tele Engineering, Microelectronics, Computer Science, or related field. 4+ years RTL Design/Hardware Engineering experience or related work experience. Skills/Experience Required Strong Domain Knowledge on RTL Design , implementation, and integration. Experience with RTL coding using Verilog/VHDL/System Verilog. Experience in micro-architecture & designing cores and ASICs. Familiar with the Synthesis, Formal Verification, Linting, CDC, Low Power, UPFs, etc. Exposure in scripting (Pearl/Python/TCL). Strong debugging capabilities at simulation, emulation, and Silicon environments. Collaborate closely with cross-function team located in different time zone to research, design and implement performance and power management strategy for product roadmap. Good team player. Need to interact with the other teams/verification engineers proactively. Responsibilities Design and lead all Front-end design activities for Display Sub-system that deliver cutting edge solution for various Qualcomm business unit like VR, AR, Compute, IOT, Mobile. Perform RTL design, simulation, synthesis, timing analysis, lint check, clock domain crossing check, conformal low power check, and formal verification for IP blocks. Work closely with technology/circuit design team to close IP block specification/requirement. Work closely with verification/physical design team to complete the IP design implementation. Support SoC team to integrate Display Sub-system IP solution into various SoC chips and front-end design flows. Work closely with system/software/test team to enable the low power feature in wireless SoC product. Evaluate new low-power technologies and analyze their applications to address requirements. Understand and perform block & chip-level performance analysis & identify performance bottleneck and provide required solution. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Minimum 4 to 8 years of work experience in ASIC RTL Design, Synthesis, STA & FVExperience in Logic design/micro-architecture/RTL coding is a must.Must have hands on experience with design and integration of complex multi clock domain blocksExperience in Verilog/System-Verilog is a must.Should have knowledge of AMBA protocols - AXI, AHB, APB, clocking/reset/debug architectureHands on experience in Multi Clock designs, Asynchronous interface is a must.Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required.Work closely with the Design verification and validation teams for pre/post Silicon debugHands on experience in Low power design is preferableExperience in Synthesis / Understanding of timing concepts for ASIC is must Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: QCT's Bangalore Wireless R&D HW team is looking out for experienced Wireless Modem HW model developers to work on Qualcomms best in class chipsets in modem WWAN IPs Roles and Responsibilities You will be contributing to flagship modem core IP development covering 5G(NR) & 4G (LTE) technologies. You will be part of team defining and developing next generation multi-mode 5G modems. You will be working on development and verification of HW models of modem core IP. The models are developed on C++/SystemC platform and used as golden reference for RTL verification and pre Silicon FW development ( virtual prototyping). The candidate must be well versed with C++ and should have good exposure to SystemC and/or System Verilog and/or Matlab. The candidate must have ability to understand HW micro-architecture & its modeling abstraction. Working knowledge of physical layer of wireless technologies like NR,LTE , WLAN, Bluetooth is highly desired. Expertise on digital signal processing and working experience on HW modeling and/or RTL design/ verification of IP are preferred. Candidates with SW/FW background on wireless IP can also apply. Candidates with strong technical knowhow on non-wireless DSP based HW IPs ( with Design / Verification/ Modeling skills) will also be considered. Minimum qualification Bachelors or Masters in Electrical/Electronics/Computers Science from reputed college/university. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: The role generally entails a mixture of: Ownership of a piece of the test bench Planning & execution of feature additions and mode re-enablement on particular variants Bug fixes Debug of regression signatures Developing/Deploying new tools for performance validation Performance monitor and profiler development and deployment Workload specific simulations on the emulator Following skillset is required: Strong Python, C++ skills Reading Specs and developing test plans Monitors, scoreboards, sequencers, and sequences, that utilize scripts, System Verilog, UVM, and methodologies to increase the rate with which bugs are found and resolved Candidates should be comfortable checking our builds, navigating big test benches, analyzing coverage, and adding or enabling extra debug, Must be willing to dig into fail and understand what is happening 6 months - 8 Years of industry experiences in the following areas- Basic of digital design concepts, fifo etc Basic understanding of DDR is a plus Understanding of interconnect protocols like AHB/AXI/ACE/ACE-Lite Understanding of multi-core ARMv8 CPU architecture, coherency protocols and virtualization Minimum requirement is Bachelor of Engineering however preferred is Masters of Engineering in Computer Science or Computer Engineering Candidate must possess right analytical skills, debug oriented mindset and must be open to discuss , deep dive, collate and present the design and environment understanding . Minimum Qualifications: Associate's degree in Computer Science, Electrical/Electronic Engineering, Engineering, or related field.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Digital Verification Engineer for IPs, ASICs and Chipsets used in Qualcomm Snapdragon power solutions. Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create job s, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age and this is where you come in. Digital Verification Engineer for for Mixed-Signals IPs, ASICs and Chipsets used in Qualcomm Snapdragon power solutions. IPs include telemetry ADCs, 100W+ charging (Quick Charge 5.0), 5G power (mmW, envelope tracking, high performance low noise oscillators etc") and high efficiency power management (DC-DC charge pumps, bucks and linear regulators). * Work includes partnering with international teams in all stages of development from system definition to high-volume (100M+) OEM launches. * Digital Verification aspects include all stages of the verification process from test planning, UVM-compliant test-bench architecture, constrained-random stimulus creation, score-boarding and coverage closure. * Work includes verification of digital and mixed-signals IPs and exposure to analog behavioral models is a plus. * Work includes debugging of complex embedded systems including SOCs, firmware, embedded sequencers. * Position includes IP or chip DV ownership including task planning and project risk mitigation. * Work in a dynamic team environment with aggressive schedule towards metrics-based high quality target. Preferred Qualifications Strong troubleshooting skills across embedded systems disciplines (digital RTL, Firmware, analog behavioral models) Strong communication and organizational skills Strong process-oriented mindset. Expert-level System Verilog Programming Advanced UVM/SV (Universal Verification Methodology using System Verilog) Python or Perl scripting Minimum Qualifications Bachelor's degree in Science, Engineering, or related field. 4+ years ASIC design, verification, or related work experience Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: QCT's Bangalore Wireless R&D HW team is looking out for experienced HW design engineer to work on WRD IPs for Qualcomms best in class Mobile chipsets. Location Bangalore Roles and Responsibilities You will be contributing to flagship Wireless IP development covering WAN, WLAN, GNSS and Bluetooth technologies. You will be part of team defining and developing next generation Wireless R&D products. The candidate must have IP design experience preferably in wireless/DSP domain. The candidate must be strong in design micro-architecture & RTL coding (System Verilog or Verilog or VHDL). Other requirements are : Exposure to synthesis & STA Low power and high speed design awareness Knowledge on design flow, industry standard frond end tools flows ( lint, cdc, etc.) Knowledge of scripting and automationUnix/Linux shell programming, Perl, Python, Makefile etc. Strong critical thinking, problem solving and debug skills Good communication and interpersonal skills. Flexible to work with multi-geo team Minimum qualification Bachelors or Masters in Electrical/Electronics/Computers Science from reputed college/university. Years of experience 2- 4years Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm WLAN HW team in Bangalore is responsible for developing and delivering best in class WLAN/WiFi solutions which are setting benchmark in wireless industry. In this role of WLAN Verification Engineer, you will be verifying the Wireless MAC subsystem. Successful candidate will be required to collaborate with worldwide design, silicon, and architecture teams to achieve all project goals. Hence, we are looking for candidates with strong communication skills . Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. As a design verification engineer you will work with a fast paced Integrated Wireless Technology (IEEE 802.11) team, with various wireless technologies embedded into an ARM based SOC infrastructure. You will be responsible for developing HW blocks (IP design), conduct High/Mid/Low level Design review and delivery IP to Subsystem team for making complex SoCs. You will be a critical part of the WLAN subsystem, contribute to IP design, sign-off the core to the SOC design team. Skills/Experience: - 3-6 years experience in Digital Design with a leading chipset company - Decent knowledge in Wireless connectivity technologiesIEEE 802.11 a/b/g/n/ac/ax/be - Knowledge in SoC architecture, including CPUs (preferably ARM), communications peripherals, multi-domain clocking, bus & interconnect structures, and power management - Strong fundamentals in one or few of these domain areas - Wireless and Mobile communications, Information theory, Coding theory, Signal processing - Strong knowledge on fixed-point implementation Truncation/Rounding/Saturation concepts - Strong knowledge on Digital communication engines viz., Demodulator, Deinterleaver, Viterbi/Turbo Decoders, Sigma-Delta modulation, Base band filters, FFT etc.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. 5+ years of experience in static timing analysis, constraints and other physical implementation aspects. Solid understanding industry standard tools PT, Tempus, GENUS, Innovus, ICC etc. Solid grip on STA fixing aspects to solve extreme critical timing bottleneck paths. Should have experienced about preparing complex ECOs for timing convergence [ across huge set of corners] through Tweaker / Tempus / Physical PT ECOs. Should be aware about the tricks for minimizing power. Experience in deep submicron process technology nodes is strongly preferred. Knowledge of high performance and low power implementation methods is preferred. Willing to push PPA to the best possible extent. Strong fundamentals. Expertise in Perl, TCL language

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Experience in Logic design /micro-architecture / RTL coding is a must . Must have hands on experience with SoC design and integration for SoCs. Experience in Verilog/System-Verilog is a must . Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in constraint development and timing closure Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Experience in Synthesis / Understanding of timing concepts for ASIC is required . Hands on experience in Multi Clock designs, Asynchronous interface is a must . Experience creating pad ring and working with the chip level floorplan team is an added advantage Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required . Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 3-6 yrs of experience