153 Gls Jobs - Page 3

As a member of the Front End CAD team, you will be responsible for the development, standardization and maintenance of engineering flows that enable system verification activities within the Solutions Engineering team, working with engineers from our project teams to help them deploy best-practise across a common set of requirements. The flows you will help to develop will include areas such as simulation, emulation and formal verification and advancements in machine-readable specifications to aid automation of standard methodology within SE, enabling our verification community to achieve the best possible results. You will collect and analyse verification metrics and work with tools from mu...

About The Role Your Role As a SoC GLS Verification Engineer , you will play a key role in verifying complex SoC designs through Gate-Level Simulation (GLS). You will work closely with design and verification teams to ensure functional correctness, timing accuracy, and overall quality of silicon-ready designs. Your expertise in GLS methodologies and debugging will be critical in delivering high-performance, reliable SoCs. In this role, you will: Perform GLS using Zero Delay , SDF , and Post-Layout GLS (PAGLS) techniques. Debug and resolve issues in gate-level simulations to ensure timing and functional correctness. Develop and maintain SystemVerilog/UVM testbenches for GLS environments. Colla...

You will be joining Broadcom Central Engineering team as a Multi Skilled RTL, Verification engineer with DFT expertise. You will have the opportunity to work in domains such as RTL, Verification, and DFT for Complex Memory, IO subsystems, and Hierarchical Blocks including BIST. This role offers a great opportunity for individuals who are eager to deepen their knowledge in end-to-end Chip development flow with specialized expertise in DFT and Memory BIST, eBIST. **Key Responsibilities:** - Perform RTL development and Verification for Digital subsystems, Memory Subsystems including BIST. - Execute DFT Insertion and Verification signoff for IO, ARM-PNR, Memory Digital Subsystems utilizing Tesse...

Role Overview: You will be responsible for verifying the design and functionality of digital circuits. Your role will involve utilizing your skills in SOC verification, PCIE, GLS, C/System Verilog, UVM, and GIT. You should have experience in PCIE-VIP usage and be proficient in working with these languages and tools to ensure the integrity and reliability of the digital designs. Key Responsibilities: - Verify the design and functionality of digital circuits - Utilize skills in SOC verification, PCIE, GLS, C/System Verilog, UVM, and GIT - Work with PCIE-VIP usage - Ensure the integrity and reliability of digital designs Qualifications Required: - Experience in SOC verification - Proficiency in...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

Role & responsibilities Be part of a team to verify complex system on a chip designs. Interact with design engineers to identify important verification scenarios. Create and enhance constrained-random verification environments using UVM/ SystemVerilog Create complex C/SV tests using reusable test libs. Team player and a mentor who is self-driven, motivated and guides a team of junior engineers Responsible for quality and timeliness of the team output Preferred candidate profile Bachelor's/ master's degree in electrical engineering or computer science, with 5-10 years of relevant experience. Experience with digital system based on AMBA Bus protocols like ACE/AXI/AHB/APB or similar complexity ...

General Summary: This position is for RTL designer role in DSP processor team. The position involves in-depth understanding of the ASIC design flow from RTL to GDS2 and the challenges posed by advanced technologies. The successful candidate will possess detailed understanding of RTL design, synthesis, static timing analysis, formal verification, PLDRC, clock domain crossing, and low power techniques. Knowledge and experience of microprocessor integration is a definite advantage. Skills/Experience Must have 3 to 15 years of practical experience with details of RTL development (VHDL and/or Verilog) including: functional and structural RTL design, design partitioning, simulation and regression,...

You have a total experience of 5 to 7 years with a minimum of 3+ years of SOC GLS experience. You have hands-on experience in GLS including Zero Delay, SDF, and PAGLS. Your strong debugging skills enable you to fix issues efficiently. In addition, you possess knowledge in SV/UVM and test bench flow. Your familiarity with EDA tools like Synopsys Verdi and Cadence NC Sim is commendable. It is expected that you have a good understanding of SOC Architecture. **Key Responsibilities:** - Hands-on experience in GLS including Zero Delay, SDF, and PAGLS - Excellent debugging skills and issue resolution - Knowledge in SV/UVM and test bench flow - Experience with EDA tools such as Synopsys Verdi and Ca...

Job Description Total experience (5 -7 years) with SOC GLS experience of minimum 3+ years Hands on experience in GLS (Zero Delay, SDF, PAGLS) Excellent debugging skills and fixing issues Knowledge in SV/UVM and test bench flow Good experience in EDA tools such as Synopsys Verdi, Cadence NC Sim. Understanding of SOC Architecture Education Qualification: Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or related field.

Greetings from Capgemini Eng, Bangalore location JD: Total experience (5 -7 years) with S OC GLS experience of minimum 3+ years Hands on ex perience in GLS (Zero Delay, SDF, PAGLS) Excellent debugging skills and fixing issues Knowledge in SV/UVM and test bench flow Good experience in EDA tools such as Synopsys Verdi, Cadence NC Sim. Understanding of SOC Architecture Primary Skills: GLS, SOC Verification. Please share updated resume to madhuri.a.sivarju@cagpemini.com Regards, Madhuri

As an Officer/Senior Officer at Basantnagar Cement Works in Telangana, your role will primarily focus on Costing & MIS tasks. Your key responsibilities will include: - Preparation of daily Cost Sheet - Reviewing Expenses GLs in SAP - Supporting DH/SH in Various Accounting and Costing related work - Conducting Vendor Reconciliation to release and Hold GST In order to excel in this role, you should possess the following qualifications and experience: Qualification Required: - B. Com/ M Com / CA Inter Professional Experience: - 3-5 years of experience in handling Accounting and reconciliation Your functional specialization should cover Accounts MIS, daily costing, Accounts Reconciliation, and T...

Desired Profile : B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or VLSI Engineering. Expertise in execution and debugging of test-suites at the GPU sub-system level Expertise in GLS (Gate-Level Simulation) Expertise in writing assertions and test benches using system verilog Expertise in UVM methodologies Expertise in Test planning Expertise in sub-system level DV Expert level proficiency (Oral + Written) in Chinese language is mandatory incase Beijing, Taiwan and Vietnam are the preferred work locations Preferred resources with valid regional work permit

Overview UVM Based verificaton at SOC level Responsibilities As a Senior Design Verification Engineer, you will define verification methodology and implement the corresponding verification plan for the SoC. You will participate in the design verification and bring-up of the SoC by writing relevant tests, coverages, assertions, developing automation infrastructure, debugging code, test benches, test harnesses, while interacting with the extended team. You will work closely with multi-disciplinary groups including Product Design, Audio Technology, Computer Vision, Hardware and Software Engineering, to create a multi-model SoC that enables development of world-class hardware devices. Requiremen...

Overview Lead Verification engineer Responsibilities As a Senior Design Verification Engineer, you will define verification methodology and implement the corresponding verification plan for the SoC. You will participate in the design verification and bring-up of the SoC by writing relevant tests, coverages, assertions, developing automation infrastructure, debugging code, test benches, test harnesses, while interacting with the extended team. You will work closely with multi-disciplinary groups including Product Design, Audio Technology, Computer Vision, Hardware and Software Engineering, to create a multi-model SoC that enables development of world-class hardware devices. Requirements Bache...

Job Description : Sub System Verification Lead : Team- Functional subsystem Verification team for MediaTek's TV/Automotive/5G/other advanced SoC development Roles Close co-work with global teams to define/verify new features for Mediatek next-gen SoC products Mentor cross-domain teams to achieve the verification goals Responsible for enhancing/developing subsys/SoC test plans and verification methodologies specific to a subsys. Be the domain expert to facilitate and set verification guidelines for global teams Opportunity to interact with top management for subsys verification related expert opinions Drive internal and 3rd party resources to build a strong subsys expertise at MediaTek Bangal...

Job Title: Lead Design Verification Engineer Location: m Bangalore Job Type: Full-time Experience Level: 7+ years Department: Hardware Engineering / VLSI Design Job Summary: We are seeking a highly experienced Lead Design Verification Engineer to lead verification efforts for complex digital designs. The ideal candidate will drive testbench architecture, verification planning, and execution for ASIC/SoC or FPGA-based designs, ensuring first-time-right silicon or system functionality. You will work closely with RTL design, DV, and system engineering teams to deliver high-quality products. Key Responsibilities: Lead and drive the verification strategy, planning, and execution for IP, subsystem...

order General information #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness,...

General Summary: QCT's Bangalore Wireless R&D(WRD) HW team in Bangalore is looking for experienced Wireless HW design verification engineers to work on Qualcomms best in class chipsets for mobile phones, wearables and IOT . Candidate will be working with ASIC designs on the latest technology nodes. This role will require the candidate to understand and work on all aspects of VLSI Verification cycle like Testbench architecture, Verification Planning, Testbench and Test development, Verification closure with best-in-class methodologies. In this role of WRD Verification Engineer, you will be verifying Wifi and/or Modem from both TX and RX perspective. The responsibilities will majorly include :...

Role & responsibilities Description: Performs semiconductor design engineering assignments including engineering and designing chip layout circuits, circuit checking, documenting specifications, modifying and evaluating semiconductor devices and components. Reviews product requirements and logic diagrams for device definition. Typically responsible for projects, or portions of projects, to design, fabricate, modify, and evaluate semiconductor devices and components. 3-5 years of experience Guide and set the direction for the verification effort within your areas of expertise in any project that the team undertakes. Provide verification support to design projects by simulating, analyzing and ...

Qualcomm India Private Limited is looking for an experienced individual with a strong knowledge of digital design and SOC architecture. You should have a good understanding of OOP concepts and hands-on experience in HVL such as System Verilog, UVM/OVM & System C, as well as in HDL such as Verilog. Knowledge of ARM/DSP CPU architecture and High-Speed Peripherals like USB2/3, PCIE, or Audio/Multimedia is essential for this role. Additionally, familiarity with Power-aware Verification, GLS, and Test vector generation would be a plus. Exposure to Version managers like Clearcase/perforce and proficiency in scripting languages like Perl, Tcl, or Python are desired skills. Analytical and debugging ...

At LeadSoc, we collaborate with renowned product companies in the Semicon, Telecom & Automotive sectors, focusing on VLSI Design, Embedded Systems, and Platform Software. If you are enthusiastic about tackling challenging assignments, we encourage you to reach out to us promptly! Engaging in a brief conversation with you will provide us with the opportunity to offer insights into the type of projects awaiting you. It will also help us understand your professional aspirations, facilitating the establishment of a meaningful connection and engagement. This position is based in Bangalore and requires 3 to 6 years of experience. **Technical Requirements:** - Proficiency in verification at SoC/Sub...

Qualcomm India Private Limited is seeking a WLAN Verification Engineer to join the Engineering Group, specifically in the Hardware Engineering team in Bangalore. As part of this team, you will be responsible for verifying the PHY Sub-System from both TX and RX perspectives for WLAN/WiFi solutions. Your role will involve understanding WLAN PHY TX and RX design paths, algorithms controlling wireless systems, and developing test plans to verify WiFi Standards including 11BE sequences and design components. Key Responsibilities: - Develop test plans and own end-to-end DV tasks for coding test bench, test cases, writing assertions, running simulations, and achieving coverage goals. - Explore inno...

As a DV Engineer focused on SOC design verification at Qualcomm India Private Limited, you will be responsible for understanding the internal requirements and complexities of a wide range of SOCs including auto, compute, mobile, XR-VR, and IoT. Your primary task will be to architect the necessary verification strategy, set up methodologies, develop test plans, and ensure that the design meets the highest quality standards. Early involvement in the product life-cycle is emphasized, requiring your participation in architecture/product definition. The ideal candidate should hold a B.E/B.Tech/M.E/M.Tech in Electronics with over 5 years of experience in the verification domain. Strong fundamental...

What You'll Do Cisco SiliconOne team is looking for an expert and talented ASIC Engineer. You will have an ASIC design background with hands-on experience in RTL design with in-depth knowledge of ASIC/SoC development cycle, the best industry practices, from specification through tape-out and lab validation, and a proven track record of success in high-performance/high-volume products. Responsibilities Looking for a Front-end Design ASIC Engineer. Architectural work: in-depth understanding of the architecture, and identification of problems and solutions. All aspects of implementation: specification, design, timing-analysis, power-optimization, flow automation, optimization of the logic for l...

The responsibilities will majorly include : Understanding of WLAN PHY TX and RX design paths, Algorithms that control the various aspects of wireless systems Develop test plan to verify WiFi Standards including 11BE, sequences and design components. Own end to end DV tasks from coding Test bench and test cases, write assertions, running simulations and achieving all coverage goals Explore innovative DV methodologies (formal, simulation and emulation based) to continuously push the quality and efficiency of test benches Successful candidate will be required to collaborate with worldwide design, silicon, and architecture teams to achieve all project goals. Hence, we are looking for candidates ...