4 Gatelevel Simulations Jobs

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10.0 - 15.0 years

0 Lacs

noida, uttar pradesh

On-site

You will be part of a dynamic and motivated team, collaborating with Systems, Design, DFT, Mixed Signal, and other local/remote teams to address verification challenges related to IPs, SubSystems, and overall systems. Your role will involve utilizing advanced verification languages and methodologies to achieve first pass success of complex IPs. - Evaluate and implement evolving verification methodologies for handling complex IP/SubSystem designs within tight schedules - Ensure quality adherence throughout all project stages, analyzing existing processes and implementing improvements for Zero Defect IPs/SubSystems - Contribute to technological innovations for self and team development - Work ...

Posted 2 weeks ago

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8.0 - 15.0 years

0 Lacs

karnataka

On-site

You will be joining Eridu AI, a Silicon Valley-based hardware startup that specializes in infrastructure solutions for large-scale AI models. As a Verification Engineer, your role will involve developing verification infrastructure and test cases for ASICs in the area of network fabrics. Your responsibilities will include providing technical leadership in ASIC verification, collaborating on gate-level simulations, conducting RTL coverage analysis, and optimizing quality assurance processes. - Develop verification infrastructure and test cases for ASICs in the area of network fabrics - Provide technical leadership in the verification of complex ASIC designs - Collaborate on gate-level simulat...

Posted 3 weeks ago

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10.0 - 14.0 years

0 Lacs

karnataka

On-site

The Manager, DFT will be responsible for implementing the hardware Memory BIST (MBIST) features that support ATE, in-system test, debug, and diagnostics needs of the memories in design. You will work closely with the design, design-verification, and backend teams to enable the integration and validation of the test logic in all phases of the design and backend implementation flow. The job requires you to have good scripting skills and the ability to design and debug with minimal oversight. You will also be involved in high-quality pattern release to the test team and support silicon bring-up and yield improvement. The ideal candidate for this role should be an ASIC Design DFT engineer with 1...

Posted 2 months ago

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5.0 - 15.0 years

0 Lacs

karnataka

On-site

You will be joining Eximietas as a Senior Design Verification Engineer/Lead in Bengaluru with 5-15 years of experience. Your primary responsibility will be to lead the SoC Design Verification efforts for complex projects, ensuring the successful execution of verification plans. This includes developing and implementing comprehensive verification strategies for high-speed and low-speed peripherals such as I2C, SPI, UART, GPIO, QSPI, as well as high-speed protocols like PCIe, Ethernet, CXL, MIPI, DDR, HBM. You will be conducting Gate-level simulations and power-aware verification using tools like Xprop and UPF. Collaboration with cross-functional teams, including architects, designers, and pre...

Posted 3 months ago

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