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Synopsys Inc logo
Senior/Lead Static Timing Analysis Engineer Synopsys Inc

5.0 - 15.0 years

0 Lacs

hyderabad, telangana, india

On-site

We are seeking an experienced, highly motivated and high-caliber individual to build these differentiating products. Does this sound like a good role for you Senior/Lead STA Engineer (R&D Engineering) Location: Hyderabad & Bhubaneswar & Bangalore Experience: 5yrs to 15yrs Strong experience in STA concepts , tools and methodologies at IP/subsystem/chip levels Hands-on experience in Synthesis, pre-layout STA, post-layout STA, CTS tools Ability to understand IP/subsystem design and come up with STA plan/checkers and reviews Sound knowledge of standard ASIC RTL2GDS physical implementation and signoff flows Exposure to design implementation and signoff of soft & mixed-signal IPs and subsystems Ex...

Posted 4 days ago

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