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5.0 - 9.0 years

0 Lacs

hyderabad, telangana

On-site

As a Design Verification Engineer at our Hyderabad location, you will be responsible for verifying the design of industry-leading products, such as Graphics DDR7. With 5-7 years of experience in SV, UVM, Test Bench Development, Soc, Full-chip verification, and memory experience, you will play a crucial role in ensuring the quality and reliability of our products. Your primary responsibilities will include Verilog simulation, UVM methodology implementation, and full-chip verification. Familiarity with memory interfaces is highly preferred. Additionally, you will have the opportunity to work on projects involving GLS, STA, Python knowledge, and circuit characterization. We are looking for someone with a quick learning ability, a positive attitude, and strong technical skills in system Verilog and UVM. Your educational background should include a bachelor's degree, and any experience in static timing analysis, GLS, and Python automation for test bench development will be advantageous. Strong communication skills are essential for this role, as you will be required to effectively convey complex technical concepts to your peers. A proactive learner with strong analytical and problem-solving skills will thrive in this dynamic environment. If you are a local candidate and an immediate joiner with a passion for design verification and a desire to work on cutting-edge products, we would love to hear from you. Join us in our mission to deliver high-quality products to our customers and make a significant impact in the industry.,

Posted 3 days ago

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