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5.0 - 7.0 years
0 Lacs
Bengaluru, Karnataka, India
On-site
Job Description As part of the methodology team, you will be responsible for developing and leading sophisticated power estimation and optimization methodologies at the netlist (gate-level) stage across SoC and IP designs. You will drive correlation strategies, automation flows, and accuracy improvements to ensure power estimates are tightly aligned with final silicon behavior. This role requires deep technical expertise in power analysis tools, a strong understanding of low-power design techniques, and collaboration with multi-functional teams across the design and verification cycle. Responsibilities Define and drive netlist-level power estimation methodologies using industry-leading tools...
Posted 4 months ago
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