3.0 - 6.0 years

5 - 8 Lacs

Bengaluru

Work from Office

Rambus, a premier chip, and silicon IP provider, is seeking to hire an exceptional mid-level Design and Verification Engineer to join our PHY integration team The successful candidate will participate in pre-silicon RTL Design and Verification activities related to PCIe and CXL Controller Soft IP development and PHYs integrations, on leading-edge PCI-Express and CXL controller technologies This is a Full Time position Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles Responsibilities Verilog RTL design in order to integrate different IPs together such as PCIe IP with vendor PHY module Verifying the IP integration with dedicated ...

Posted 1 month ago

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