775 Fpga Jobs - Page 13

Responsibilities: * Develop verification plans and strategies using SV and UVM methodologies. * Execute thorough FPGA design verifications with high accuracy. 5 to 9 years of experience into FPGA Verification Strong in RCA, Assertions, Leading etc.

Responsibilities: * Collaborate with cross-functional teams on project requirements and deliverables. * Ensure compliance with IEC 60601 standards for medical devices. strong understanding of FPGA platforms AMD/Xilinx, Vivado, VHDL and RTL. Provident fund

Design and implement digital circuits using FPGA technology . Apply a solid understanding of digital logic design principles . Develop code using VHDL (preferred) and/or Verilog for FPGA applications. Use Vivado tool for synthesis, implementation, and debugging. Test and validate designs to ensure they meet performance specifications. Collaborate with cross-functional teams to align design with project goals. Analyze and resolve complex issues with strong problem-solving skills . Communicate effectively and contribute in a collaborative environment . Manage multiple projects with independence and accountability . Stay current with evolving FPGA tools and technologies .

FPGA ENGINEERING INTERN Are you someone who is passionate about challenging the status quo? Do you enjoy the process of problem solving, a process where you recognize areas of improvement and iterate and innovate to improve? Does your curiosity and desire to learn drive you? If so, then join IMC as a Hardware Engineer Intern! At IMC, Hardware Engineers don t just write code and design technology. They are responsible for spotting new opportunities, developing new technologies and solving problems. As a result, they deliver results and make a difference. IMC knows that having the best technology is what drives our business. Hardware development here is innovative, pragmatic and fun, even as complexity grows. WHAT YOU LL DO: As a Hardware Engineer Intern, you will learn what it means to be an Engineer in a real-world environment. The internship program is focused on enhancing your knowledge of algorithm complexity, professional design, and writing fluent code. Your responsibility does not stop at programming; it also encompasses knowledge building of our business model and building relationships across our trading and technology teams. As a Hardware Engineer Intern at IMC you will be supported by both a mentor who will oversee your projects and professional development. You will have access to pair programming and code reviews, not to mention our incredible social activities and events. WHAT WE LOOK FOR: Student in (pen)ultimate year of Electrical Engineering or Computer Science Engineering Strong analytical skills and desire to solve complicated problems programmatically; Must have proficient experience in Verilog, VHDL or other RTL programming (additional software experience is a plus; Python, C++, or similar); Interest in financial markets is a must, but no prior knowledge or experience is required; Available for at least 9 weeks. OUR CULTURE: We are at the core a trading firm; however, we value trading and technology equally and we believe that cooperation between traders and technologists is one of our great strengths. This is also reflected in our organizational and remuneration policies. We believe in fostering a truly flat environment in which great ideas can be recognized as well as put into practice from anybody within our organization. Internship Stipend INR 25,00,000/- Per Intern for 2 Months [Including INR 5,00,000/- Sign on Bonus] IMC is a global trading firm powered by a cutting-edge research environment and a world-class technology backbone. Since 1989, we ve been a stabilizing force in financial markets, providing essential liquidity upon which market participants depend. Across our offices in the US, Europe, Asia Pacific, and India, our talented quant researchers, engineers, traders, and business operations professionals are united by our uniquely collaborative, high-performance culture, and our commitment to giving back. From entering dynamic new markets to embracing disruptive technologies, and from developing an innovative research environment to diversifying our trading strategies, we dare to continuously innovate and collaborate to succeed.

SMTS SOC Architect PCIe/CXL/UAL/DMA THE ROLE: AMD-Xilinx is looking for a SMTS SoC Architect to join the team in defining the next generation of Adaptive and Embedded SoCs. You will drive novel SoC architecture solutions across a wide range of applications, including Embedded Computing, AI/ML, Data Center, Communications, Automotive, and Aerospace, in close collaboration with customers, partners, product planning, SoC and IP architects, and design & verification teams. THE PERSON: As a SMTS SoC Architect you will help drive new architecture initiatives that leverage the state-of-the-art PCIe, CXL, and Confidential Compute technologies and standards. You will exercise your deep technical expertise and excellent communication skills to collaborate with design and product planning with an eye towards delivering innovative and highly competitive adaptive accelerators and embedded computing solutions. KEY RESPONSIBILITIES: Responsible for driving the SoC architecture, with a particular focus on I/O subsystems connected over PCIe, UAL or CXL. Define I/O subsystem and PCIe DMA architectures, including their interactions with internal embedded processor-subsystems, Network on Chip, Memory controllers, and FPGA fabric. Create flexible and modular I/O subsystem architectures that can be deployed in either chiplet, monolithic or 3D form factors. Work with customers, and cross-functional teams to scope SoC requirements, analyze PPA tradeoffs, and then define architectural requirements that meet the PPA and schedule targets. Define I/O subsystem and DMA hardware, software, and firmware interactions with embedded processing subsystems and external CPUs. Author architecture specifications in clear and concise language. Guide and assist pre-silicon design/verification and post-silicon validation during the execution phase. PREFERRED EXPERIENCE: Strong technical background architecting SoC and I/O subsystems involving PCIe, PCIe-DMA engines, or CXL. Deep technical knowledge of the PCIe or CXL protocol specifications, and how mandatory and optional protocol features are leveraged in PCIe or CXL devices. Domain expertise in embedded computing, aerospace & defense, data-center, networking, or automotive industries. Knowledge of I/O Subsystem and DMA interactions with internal embedded processor-subsystems (x86, RISC-V or ARM) and external host CPUs. Knowledge of bridging and ordering rule enforcement between on-chip protocols such as AXI, and off-chip protocols such as PCIe desired. Knowledge of ARM Processors and AXI Interconnects desired. Knowledge of FPGA and AI/ML Accelerators desired. Knowledge of boot, security, debug, telemetry and RAS desired. ACADEMIC CREDENTIALS: BS/MS/PhD in electrical or computer engineering or related field. LOCATION: Hyderabad, India #LI-MK1

Job Title Engineering Manager - Electrical Job Description Engineering Manager - Electrical In late January, we announced that Bridgefield Capital signed an agreement to acquire Philips Emergency Care business which includes leading brands and products like HeartStart AEDs, Intrepid and DFM100 monitor defibrillators, Tempus monitor and Tempus ALS systems, and Corsium and ECI informatics solutions. We expect the transaction to close at the end of 2025. With Bridgefield s support and building on our 40+ year legacy of growth and innovation in emergency medical technology, the Emergency Care business will continue passionately pursuing our mission of saving lives, lowering the cost of healthcare, and advancing the science of resuscitation while serving the public access AED, EMS, military, and hospital market segments. In this role, you have the opportunity to Be an integral part of the Emergency Care and Resuscitation (ECR) R&D leadership team, actively participating in cardiac defibrillator product development. ECR team has a broad product portfolio of advanced life support solutions, automated external defibrillators, monitoring and data management solutions. Our mission is to design, produce, and deliver every solution as if the life of someone we love depends on it. Every day, we empower and enable our customers - from clinicians to paramedics, first responders to the everyman - to save lives using our innovative, market-leading technology. Your role: We are looking for a passionate Technical Engineering Manager-Electrical to join us as we strengthen our product portfolio, expand our services and solutions, and bring game-changing technology to the market. This team member will be responsible for working collaboratively with a team of cross-functional engineers. Lead, mentor, and grow a high-performing electrical engineering team. Drive performance management, talent development, and resource planning. Align team priorities with business strategy and R&D roadmaps. Manage program-level budget and resource allocation in collaboration with business stakeholders. Provide end-to-end ownership of electrical system design: requirements, schematics, PCB layout, testing, and integration. Ensure designs meet regulatory, architectural, and system-level requirements. Lead sustaining engineering, VAVE initiatives, and supplier transitions for existing and legacy products. Oversee root cause analysis and corrective actions for field and manufacturing issues. Guide the reverse engineering and redesign of legacy systems and components. Champion best practices in Analog, Digital, and Mixed-signal design. Support DfM/DfT, system verification, and V&V activities across the product life cycle. Ensure EMI/EMC compliance and integrate high-voltage and power supply modules (SMPS) into designs. Review and approve PCBA/electrical design specifications for release to manufacturing. Work closely with global and local teams across Systems Engineering, Software, Design Transfer, Quality, and Regulatory. Partner with external vendors, design houses, and contract manufacturers. Contribute to technology planning, roadmaps, and continuous improvement projects. Youre the right fit if: Bachelors/Master s in electrical, Electronics, EE, Control systems, High voltage or equivalent. A master s degree is preferred. Total 12+ years experience with a Minimum of 5+ years of People Management experience in a Class-3 medical device or other similar industry. Several years of hands-on experience in leading medical devices/products development/maintenance. Strong hands-on experience in Analog/digital/mixed-signal circuit design. Proficient in PCB design, schematic entry (Mentor Graphics or equivalent) Excellent communication skills and handling of stakeholder. Strong technical background in R&D engineering disciplines (e.g. FPGA/ Microprocessor/ DSP, PCBA design, High voltage electronics). Solid understanding of high-voltage design, SMPS, EMI/EMC standards, and board-level troubleshooting. Familiar with FDA 21 CFR Part 820.30, IEC 60601-1, ISO 13485, and CE/FDA compliance processes. Demonstrated ability to lead technical teams, manage stakeholders, and drive cross-functional execution. Strong mentoring, decision-making, and problem-solving capabilities. Experience with international medical Quality and Regulatory standards (e.g. IEC, FDA, UL, CE, etc.) is preferred. How we work together We believe that we are better together than apart. For our office-based teams, this means working in-person at least 3 days per week. Onsite roles require full-time presence in the company s facilities. Field roles are most effectively done outside of the company s main facilities, generally at the customers or suppliers locations. This role is an office-based role. About Philips We are a health technology company. We built our entire company around the belief that every human matters, and we wont stop until everybody everywhere has access to the quality healthcare that we all deserve. Do the work of your life to help the lives of others. Learn more about our business . Discover our rich and exciting history . Learn more about our purpose . If you re interested in this role and have many, but not all, of the experiences needed, we encourage you to apply. You may still be the right candidate for this or other opportunities at Philips. Learn more about our culture of impact with care here . #LI-PHILIN

Key Responsibilities: Design and develop FPGA-based hardware systems. Create schematic designs using Cadence OrCAD Capture (preferred). Review and verify PCB layouts using Cadence Allegro (preferred). Validate mechanical housing designs for physical integration. Perform hardware testing, debugging, and validation. Collaborate with cross-functional teams to meet design and project goals. Solve complex technical issues with strong analytical skills. Communicate effectively and work well in a team environment. Manage multiple projects independently with attention to detail. Stay updated with emerging hardware design technologies.

Role & responsibilities Ensure the installation, Qualification, and Maintenance of the SPMs, Testers, Fixtures at out Customer site related to the PCBA and Box build assemblies in accordance with Our standards to ensure smooth assembly and testing processes. Work hand in hand with the our ME team, as part of the team ensure builds in PCBA & boxbuilds are completed as per the project schedules. Accountable for the allocated project's completion at the CM side including SPM, ATE, FCT, ICT, and FPT as per the need of the program. Communicate with the Vendors and Suppliers for expediting of the SPM equipment, fixtures, testers, jigs, ATEs, etc to achieve the timelines. Monitor daily production plan vs actual, first pass yield, and ensure the CM is implementing and taking necessary actions to reduce the failures Ensure the OEE of the SPMs, Testers, and ATEs are kept 98% Working with vendors in communicating requirements, reviewing designs and equipment building at vendor places. Validate testing and process cycle times and yield to meet the TAKT and OEE requirements Accountable for PCBA & BoxBuild debug & analysis data sharing on a daily basis also publish the results of the DOEs and special builds conducted. Conduct pre-audits prior to Equipment stabilization and PPAP and continue to do periodic line audits and publish the NCs to the ME team at IBC. Execute and monitor the DOEs assigned at foxconn for the box build assembly process improvements. Should travel to our Bangalore office or factory as and when requested. Required to work on Testers & ICT fixtures at Foxconn for any upgrade that is required on a hardware or software level. Preferred candidate profile Working knowledge in understanding assembly instructions & CTQ requirements for PCBs, PCBAs & Box builds. Sound understanding in handling child components of both PCBA & Box builds. Hands on with the ability to understand the complete PCBA flow thereby resolving issues in the line Test plan and test point coverage analysis Working knowledge of Gerbers, ODB++, CAD files MSA, Gage R&R and calibration practises. Working knowledge in the testing domain such as ICT, FCT & box builds. Dipl. / B.E or equivalent with Specialization in Electrical / Electronics / Electronics & Communication / Instrumentation & Control 2 - 5 years of relevant experience in NPI activities & testing for module development in Automotive / IoT Systems / Portable consumer electronics domain. Tools: Gerber View, Allegro, eCAD

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a team first organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you re looking for. Responsibilities & Skills Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a team first organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you re looking for. Lattice Semiconductor is seeking a Firmware Design Engineer-2 to join the Architecture team focused on FPGA architecture modeling and firmware engineering. This position is an opportunity to be part of a dynamic team with ample opportunity to contribute, learn, innovate and grow. Role/Responsibility specifics: This is a full-time Firmware Engineer-2 position located in Pune, India. The candidate will assist in the design, development, and testing of firmware for embedded systems. The candidate will have to collaborate with the hardware and software teams to integrate debug and release firmware. The candidate will actively participate in Code Reviews to ensure code quality. Collaborate with cross-functional teams that are spread globally. Document firmware design and development processes implemented by the candidate. Required Skills: BS/MS/PhD Electronics Engineering, Electrical Engineering, Computer Science or equivalent. 3+ years of relevant experience Basic understanding of embedded systems and microcontrollers. Proficiency in programming languages such as C/C++. Familiarity with Python and shell scripting is desirable. Familiarity with debugging tools and techniques. Strong problem-solving skills and attention to detail. Open to work with multiple groups across different sites and time zones. Excellent communication skills. Knowledge of digital design, CMOS technology, basic electronics is an added plus.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a team first organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you re looking for. Responsibilities & Skills Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a team first organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you re looking for. Lattice Semiconductor is seeking a SoC RTL Design Engineer to join the HW design team focused on IP design and full chip integration. This position is an opportunity to be part of a dynamic team with ample opportunity to contribute, learn, innovate and grow. Role specifics: This is a full-time individual contributor position located in Pune, India. The role will focus on RTL design and full chip integration and projects concentrated in Pune and similar time zones. The qualified candidate will be working in RTL design, best-in-class coding styles, algorithms, and both Verilog and System Verilog. The qualified candidate will be working in SoC integration and associated quality checks including lint, CDC, RDC, SDC etc. The role requires to work with architect and micro-architect team to understand define design specifications The successful candidate will be open and willing to both (a) teach best-known-methods to an existing design team and (b) learn from the team about the complications of highly programmable FPGA fabrics. This role carries the need to be both a strong educator and an open-minded student. Accountabilities: Serve as a key contributor to RTL design efforts. Drive logic design of key blocks & full chip and bring best-in-class methodologies to accelerate design time and improve design quality. Ensuring design quality through assertions, checkers, and scripting. Develop strong relationships with worldwide teams. Mentor and develop strong partners and colleagues. Occasional travel as needed. Required Skills: BS/MS/PhD Electronics Engineering, Electrical Engineering, Computer Science or equivalent. 5+ years of experience in driving logic design across a multitude of silicon projects. Expertise in SoC integration, defining micro-architecture and experience of selecting 3rd party IP. Experience in working with ARM processor, AXI, AMBA bus, ENET, PCIE, safety and security protocols, debug architecture will be plus. Familiarity with FPGA designs, use-cases, and design considerations is a plus. Independent worker and leader with demonstrated problem-solving abilities. Proven ability to work with multiple groups across different sites and time zones. Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry. Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 800 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA , CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com . You can also follow us via Twitter , Facebook , or RSS . At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates. Lattice Feel the energy.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a team first organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you re looking for. Responsibilities & Skills Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a team first organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you re looking for. Lattice Semiconductor is seeking a Sr. Staff Physical Design Engineer to join the HW design team focused on IP design and full chip integration. This position is an opportunity to be part of a dynamic team with ample opportunity to contribute, learn, innovate and grow. Role specifics: This is a full-time individual contributor position located in Pune, India. The qualified candidate will be implementing and lead RTL to GDSII flow for complex design. The qualified candidate will work and lead one or more aspects of physical design including place & route, CTS, routing, floorplanning, powerplanning, timing and physical signoff The qualified candidate is expected to have experience in physical design signoff checks, including timing closure, EM/RV and physical verification (DRC, LVS). The qualified candidate is expected to drive efficiency and quality of physical design flow and methodology and work together with internal EDA team and external tool vendors The qualified candidate is expected to have scripting knowledge or perl /python etc to improve design efficiency and methodology development. Collaborate with RTL, DFT , verification and full chip teams to ensure robust design implementation. The successful candidate will be open and willing to both (a) teach best-known-methods to an existing FPGA team and (b) learn from the team about the complications of highly programmable FPGA fabrics. This role carries the need to be both a strong educator and a open-minded student. Accountabilities: Serve as a key contributor to FPGA design efforts. Drive physical design closure of key ASIC blocks & full chip and bring best-in-class methodologies to achieve best power, performance, and area. Ensuring design quality through all physical design quality checks and signoff. Develop strong relationships with worldwide teams. Mentor and develop strong partners and colleagues. Occasional travel as needed. Required Skills: BS/MS/PhD Electronics Engineering, Electrical Engineering, Computer Science or equivalent. 12+ years of experience in driving physical design activities of ASIC blocks and full chip. Must have experience of multiple tapeouts Experience on working with industry standard physical design tools including Innovus, Genus, Tempus, voltus, calibre, conformal etc. Independent worker with demonstrated problem-solving abilities. Proven ability to work with multiple groups across different sites and time zones Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry. Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 800 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA , CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com . You can also follow us via Twitter , Facebook , or RSS . At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates. Lattice Feel the energy.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a team first organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you re looking for. Responsibilities & Skills Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a team first organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you re looking for. Lattice Semiconductor is seeking a Design Engineer-2 FPGA Architecture to join the Architecture team focused on FPGA architecture modeling and advance system architecture. This position is an opportunity to be part of a dynamic team with ample opportunity to contribute, learn, innovate and grow. Role specifics: This is a full-time individual contributor position located in Pune, India. The role will focus on FPGA projects concentrated in Pune and similar time zones. The qualified candidate will be working in RTL design, best-in-class coding styles, algorithms, and both Verilog and System Verilog. The qualified candidate will be working in architecture modeling and evaluation of Lattice FPGA s and Software tools to measure performance, power, and area for various workloads The qualified candidate will be expert in driving Subsystem development and ensure design meets high standards of quality and reliability, conduct regular reviews and audits The role requires working closely with Software tools team to define benchmarks, measure performance and suggest improvement areas Serve as a technical expert, providing guidance and support to other engineers. The successful candidate will be open and willing to both (a) teach best-known-methods to an existing FPGA team and (b) learn from the team about the complications of highly programmable FPGA fabrics. This role carries the need to be both a strong educator and open-minded student Accountabilities: Serve as a key contributor to build FPGA architecture modeling and evaluation platform efforts Drive logic design of key FPGA workloads and bring best-in-class methodologies to accelerate design and test time and quality. Develop the regression testing framework to execute, measure and report architecture modeling and evaluation experiments Ensuring design quality throughout project development conducting regular reviews and audits Perform architecture evaluation of competitive products Work with cross functional team including program management, Software Tools, HW architects, pre and post silicon validation to drive the program Develop strong relationships with worldwide teams. Drive continuous improvement initiatives, staying up to date with the latest industry trends and technologies Occasional travel as needed. Required Skills: BS/MS/PhD Electronics Engineering, Electrical Engineering, Computer Science or equivalent. 3+ years of experience in driving logic design across a multitude of FPGA projects. Expertise in FPGA designs, use-cases, and design considerations, defining micro-architecture and experience of working with various EDA tools Experience in leading the project throughout design cycle and working with cross organization Proven ability to work with multiple groups across different sites and time zones. Independent worker and leader with demonstrated problem-solving abilities. Proven ability to work with multiple groups across different sites and time zones.

We are seeking a motivated and technically sound Digital Electronics Engineer with 3-4 years of experience in embedded hardware design and testing. The ideal candidate will be responsible for the development and validation of digital circuits for microcontroller-based embedded systems. This role requires strong fundamentals in digital design, proficiency in schematic tools, and the ability to interface effectively with firmware and cross-functional engineering teams. Key Responsibilities Design and develop digital hardware circuits for embedded applications. Perform schematic capture and PCB layout review with attention to signal integrity and board-level constraints. Validate and test embedded hardware platforms including microcontrollers, memory, and digital I/O. Prepare and execute hardware test plans, validation procedures, and technical documentation. Collaborate with firmware teams for successful hardware-software integration. Conduct board-level troubleshooting and failure analysis during bring-up and validation. Evaluate and select digital components including logic ICs, FPGAs/CPLDs, level shifters, and memory modules. Interface with digital protocols and buses such as SPI, I2C, UART, GPIO, SRAM, and Flash. Qualifications and Skills Education and Experience Bachelors degree in Electronics or Electronics & Communication Engineering. 3-4 years of experience in embedded digital hardware design and validation. Technical Skills Strong understanding of digital electronics and logic design. Hands-on experience with microcontroller-based design (ARM, AVR, PIC, etc.). Proficiency in schematic tools like Altium, OrCAD, or KiCad. Familiarity with PCB layout guidelines and high-speed digital design practices. Skilled in using lab test instruments including oscilloscopes, logic analyzers, and multimeters. Ability to interpret datasheets and apply specifications to design. Experience with EMI/EMC design considerations and compliance testing is a plus. Preferred Skills Exposure to FPGA or CPLD-based hardware design. Basic embedded C knowledge to support hardware-firmware debugging. Experience creating and maintaining engineering documentation. Soft Skills Strong analytical and problem-solving capabilities. Clear communication skills and a collaborative mindset. Self-driven and capable of managing multiple tasks and timelines. Apply for a Digital Electronics Engineer Position Azista BST Aerospace Plot No. 16, Sanand Land Industrial Estate Corporation, Sarkhej-Sanand Road, Ularia, Sanand, Ahmedabad, Gujarat, India - 382 210. Registered Office Sy.No 80-84, Melange Towers, 4th Floor, C Wing, Patrika Nagar, Madhapur, Hyderabad, Telangana, India - 500 081.

Grow with us About this Opportunity: Are you passionate about driving innovation and working on groundbreaking 5G and 6G mobile communication solutions? Do you thrive in a flexible working culture, where new insights are championed, and you are encouraged to develop new skills? We are looking for an FPGA Verifier to join the Ericsson Silicon organization. You will work with dedicated engineers who are passionate about developing world-class Radio and RAN Compute products. You will play a key role in the FPGA team defining verification strategies and implementing environments for high-efficiency data transfer and processing with embedded subsystems. As part of our global organization, youll collaborate with talented teams across our various sites. We are committed to Agile principles, fostering a collaborative and innovative work environment that encourages creativity and teamwork. You will do: - Define verification requirements and strategies for FPGA and/or ASIC designs based on functional specifications and Ericsson development processes - Implement verification environments and test cases to execute verification plans - Measure functional and code coverage metrics, driving towards completion targets - Debug RTL in conjunction with designers - Collaborate with hardware, software, systems, and integration teams to understand overall product requirements and drive efficient solutions - Contribute to the continuous improvement of products, tools, and processes - Generate appropriate documentation You must have: - 5+ years of experience in FPGA/ASIC verification - Excellent knowledge of UVM and SystemVerilog - Ability to architect and create RTL testbenches from scratch - Strong knowledge of object-oriented programming - Experience with embedded software design and testing - Familiarity with modern FPGA device families and tools - Experience with scripting languages such as Python, Tcl, shell scripting, etc. - An analytical approach and results-oriented mindset with the ability to deliver under pressure - Excellent English verbal and written communication skills - High self-motivation and the ability to work independently while being a great teammate - A track record of successful cross-team and cross-site cooperation - A Masters degree in Electrical or Computer Engineering or equivalent Primary country and city: India (IN) || Bangalore Req ID: 768576

System Validation engineers in this group are responsible for driving validation specifications & methodology and deliver on the validation of IPs for the next generation of compute solution. .You will work closely with architecture, design, verification, modelling, performance analysis, SW development, Emulation and FPGA and Board development engineers. Responsibilities: Work with project team to understand, review the system requirements and deliver emulator testbench specifications. Key responsibilities will include owning the development of validation platform in emulation, debug methodology, developing and implementing the test content, finding bugs, and running various validation checks for IPs (CPUs and SystemIPs), Interfaces (like CHI, PCIe etc) in emulation environment. Will guide other members of the team as needed to enable the successful completion of project activities Required Skills and Experience : Bachelors (BS) or Masters (MS/MSc) in Electronics, Electrical or Computer Engineering - although other degrees will be considered with relevant work experience You will need experience of Emulation and system level validation for IPs and sub-systems and ASIC products. Emulation build skills and knowledge for a subsystem in at least one emulation system is required. Execution of the design in emulation platform and knowledge of hardware and software interplay is required. You possess the knowledge of Validation test content using C, C++ etc and how they can be performed in an emulation-based system. Expertise on hardware behavioral language (Verilog, System Verilog) Exposure to producing validation specifications and documentation describing sophisticated designs Ability to work under time-scale pressure and meet ambitious targets without compromising on quality Understanding of the fundamentals of computer architecture, system IP, memory subsystem, accelerator. Practical experience of working on Processor based system designs Nice To Have Skills and Experience : Demonstrated understanding of CPU/ GPU subsystem in SoC environment and proven expertise in owning validation requirements & Validation Plan. Hands on Experience in validating multiple sub systems for ASICs/ SoCs in system environment ( across Emulation, FPGA and Development/Eval board), owning all phases of validation ( Test development, Execution and Debug) for owned sub systems. Understanding of SoC security aspects

We are looking for an FPGA Verifier to join the Ericsson Silicon organization. You will work with dedicated engineers who are passionate about developing world-class Radio and RAN Compute products. You will play a key role in the FPGA team defining verification strategies and implementing environments for high-efficiency data transfer and processing with embedded subsystems. As part of our global organization, youll collaborate with talented teams across our various sites. We are committed to Agile principles, fostering a collaborative and innovative work environment that encourages creativity and teamwork. You will do: - Define verification requirements and strategies for FPGA and/or ASIC designs based on functional specifications and Ericsson development processes - Implement verification environments and test cases to execute verification plans - Measure functional and code coverage metrics, driving towards completion targets - Debug RTL in conjunction with designers - Collaborate with hardware, software, systems, and integration teams to understand overall product requirements and drive efficient solutions - Contribute to the continuous improvement of products, tools, and processes - Generate appropriate documentation You must have: - 5+ years of experience in FPGA/ASIC verification - Excellent knowledge of UVM and SystemVerilog - Ability to architect and create RTL testbenches from scratch - Strong knowledge of object-oriented programming - Experience with embedded software design and testing - Familiarity with modern FPGA device families and tools - Experience with scripting languages such as Python, Tcl, shell scripting, etc. - An analytical approach and results-oriented mindset with the ability to deliver under pressure - Excellent English verbal and written communication skills - High self-motivation and the ability to work independently while being a great teammate - A track record of successful cross-team and cross-site cooperation - A Masters degree in Electrical or Computer Engineering or equivalent

Candidate should have experience in Software development, tools development role, firmware development role or validation tools development.Candidate shall design and develop algorithms for Post Silicon Validation of next generation IBM server processors, SOCs and ASICs. He/She will be working on processor Bringup Activities and own key debugs during the bring up/power on phase. The candidate will be expected to interface with multiple stakeholders in hardware design teams, lab teams, performance teams and characterization teams. Candidate must work on coverage closure by developing comprehensive test plans and strategies and drive to achieve coverage goals while interacting with stakeholders, verif teams and design teams. He/She must be skilled in utilizing object-oriented programming skills in C/C++ and scripting languages like Python/Perl to write complex test scenarios to automate/optimize. Candidate must possess experience in verifying multi-processor cache coherency and memory subsystems, ensuring seamless operation in complex systems. Proficiency in emulator env/FPGA validation is preferred. She/he must possess excellent communication skills and understand agile processes. The candidate must have an eagerness and curiosity to learn and be willing to code and participate hands on. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Technical ExpertiseVery proficient in C programming, Strong Scripting skills. Over 10 years experience in hands on Software development using C, C++. Computer Architecture KnowledgeIn-depth knowledge of computer architecture, including processor core design specifications, instruction set architecture, and logic verification. Multi-Processor Cache CoherencyExperience in verifying multi-processor cache coherency and memory subsystems, ensuring seamless operation in complex systems. Operating Systems and ConceptsAtleast 2 years experience with Multithreading, context switching, memory management related development Preferred technical and professional experience IO device drivers, firmware exposure(NIC controller, PCIe device controllers, ASIC FW development experience) ARM architecture RISC V architecture Spike simulator experience, QEMU simulator

Lead the architecture, design and development of a server class, high- performance Processor CPU for IBM Systems. - Architect and design Instruction caches, Branch Predictors, Issue queues, Register Renaming, Load Store Execution and other areas of the IBM processor CPU - Research novel instruction/data prefetching and branch prediction architectures. - Develop the features, present the proposed architecture in the High level design discussions - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature. - Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in post silicon lab bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. Required education Bachelor's Degree Preferred education Doctorate Degree Required technical and professional expertise Expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA - Experience with high frequency, instruction pipeline designs - In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) - Proficiency of RTL design with Verilog or VHDL - Nice to haves - Knowledge of verification principles and coverage - High-level knowledge of Linux operating system - Knowledge of object oriented languages and scripting languages - Understanding of Agile development processes - Experience with DevOps design methodologies and tools Preferred technical and professional experience Expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA - Experience with high frequency, instruction pipeline designs - In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) - Proficiency of RTL design with Verilog or VHDL - Nice to haves - Knowledge of verification principles and coverage - High-level knowledge of Linux operating system - Knowledge of object oriented languages and scripting languages - Understanding of Agile development processes - Experience with DevOps design methodologies and tools

Understand the design specification , PowerOn Specification, and Power management specification. Understand boot firmware and reset flow. And/or Power management flow. Develop skills in IBM BIST verification tools and apply them successfully Develop the verification environment and test bench Debug fails using waveform, trace tools and debug RTL code Work with Design team in resolving/debugging logic design issues and responsible for deliveries Required education Bachelor's Degree Required technical and professional expertise . 6 years of experience in Design Verification - demonstrated execution experience of verification of logic blocks Strong in SoC verification Chip reset sequence and initialization, and/or Power management. Knowledge of verification (any) methodology, Knowledge of HDLs (Verilog, VHDL) Good programming skills in C/C++, Python/Perl Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Hardware debug skills backed by relevant experience on projects Exposure in developing testbench environment, write complex test scenarios Good communication skills and be able to work effectively in a global team environment Drive verification coverage closure Preferred technical and professional experience Knowledge of Chip-Initialisation , SCAN , BIST is a plus Scripting Expertise backed up relevant experience in the same Writing Verification test plans Functional and code coverage analysis and debug

Lead the architecture, design and development of Processor Core Front end of pipeline units for high-performance IBM Systems. - Architect and design I-Cache, Instruction Fetch, Branch Prediction and Decode units of a high performance processor CPU - Develop the features, present the proposed architecture in the High level design discussions - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature. - Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in post silicon lab bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. Required education Bachelor's Degree Preferred education Doctorate Degree Required technical and professional expertise .12 or more years of demonstrated experience in architecting and designing specific CPU unit(eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) - Hands on experience of different Branch Prediction techniques - Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA - Experience with high frequency, instruction pipeline designs - At least 1 generation of Processor Core silicon bring up experience - In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) - Proficiency of RTL design with Verilog or VHDL - Knowledge of at least one object oriented or functional programming language and scripting language. - Nice to haves - Knowledge of instruction decode and handling pipeline hazards - Knowledge of verification principles and coverage - High-level knowledge of Linux operating system - Understanding of Agile development processes - Experience with DevOps design methodologies and tools Preferred technical and professional experience Hiring manager and Recruiter should collaborate to create the relevant verbiage.

Lead the architecture, design and development of a server class, high- performance Processor CPU for IBM Systems. - Architect and design Instruction caches, Branch Predictors, Issue queues, Register Renaming, Load Store Execution and other areas of the IBM processor CPU - Research novel instruction/data prefetching and branch prediction architectures. - Develop the features, present the proposed architecture in the High level design discussions - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature. - Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in post silicon lab bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. Required education Bachelor's Degree Preferred education Doctorate Degree Required technical and professional expertise Expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA - Experience with high frequency, instruction pipeline designs - In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) - Proficiency of RTL design with Verilog or VHDL - Nice to haves - Knowledge of verification principles and coverage - High-level knowledge of Linux operating system - Knowledge of object oriented languages and scripting languages - Understanding of Agile development processes - Experience with DevOps design methodologies and tools

Job Title: Project Manager - Cloud FPGA Platform About the Role: We are seeking a seasoned Project Manager with 10-15 years of experience leading large-scale, multi-disciplinary engineering projects. In this role, you will be responsible for driving the execution of a Cloud FPGA benchmarking and deployment platform that enables seamless comparison of REDEFINE FPGA workloads with traditional CPU and GPU targets. The platform involves automated configuration, AWS-based provisioning, CI/CD integration, bitstream generation, performance benchmarking, and application deployment. The ideal candidate will combine strong cloud infrastructure management experience, FPGA design process understanding, and excellent project management discipline. You will coordinate across multiple technical teams including hardware, software, and DevOps - and external collaborators to deliver a scalable, secure, and user-facing cloud platform. Key Responsibilities: Program Strategy & Execution: Define and manage the Cloud FPGA roadmap, aligning it with business needs and product goals. Ensure that all phases - from FPGA image generation to multi-node scaling are executed on schedule Stakeholder Management: Act as the single point-of-contact across multiple stakeholders, including internal hardware/software/DevOps teams and external solution partners Cloud Architecture & Provisioning: Coordinate the setup and lifecycle of Terraform-managed AWS resources including EC2, F1/F2, IAM, and container-based infrastructure. CI/CD Orchestration: Lead the integration of GitHub Actions, Jenkins, or other CI pipelines to automate FPGA builds, AFI generation, test deployments, and reporting flows. Multi-FPGA Scaling: Oversee implementation and testing of multi-node deployments using tools like FireSim, Switchboard, or Fireaxe. Ensure performance, latency, and synchronization goals are met. Performance Metrics & Dashboarding: Enable instrumentation pipelines to collect application logs, performance counters, and profiling data. Oversee dashboard development using CloudWatch or other telemetry tools. Security & Governance: Ensure IAM role management, access control, secure provisioning policies, and compliance with internal security standards for all cloud deployments. Milestone Tracking: Monitor sprints, deliverables, blockers, and inter-team dependencies using Agile tools (e.g., Jira, Azure Boards, Planner Premium). Ensure timely delivery and escalation of risks. Documentation & Reporting: Maintain internal documentation for architecture, processes, and workflows. Provide weekly and monthly reports for the leadership team Required Skills & Experience: 10-15 years of experience in project or program management across cloud infrastructure, semiconductor, or embedded systems domains. Educational background in Electronics Engineering, Electrical Engineering, or Computer Engineering. Deep familiarity with Agile methodologies and managing sprints, reviews, and delivery workflows using tools like Jira, Planner Premium, or Azure DevOps. Experience with Infrastructure-as-Code (IaC) frameworks such as Terraform or CloudFormation, and automation of AWS resource deployments. Strong knowledge of AWS services such as EC2, IAM, S3, VPCs, and particularly AWS FPGA offerings like F1/F2 instances. Proven experience coordinating with vendors such as BlueSpec and ZeroASIC, and using tools like FireSim, Switchboard, and Fireaxe for simulation and deployment. Understanding of FPGA build processes, bitstream creation, AFI packaging, and integration with Linux-based cloud hosts. Strong interpersonal and communication skills; ability to work across time zones with internal teams and external vendors. Ability to thrive in ambiguous environments, set direction, and provide structure where it does not exist. Preferred Qualifications: Certifications: AWS Certified Solutions Architect, PMP, or Scrum Master certifications are desirable. Experience with AMI/AFI lifecycle management, remote debugging, and DevOps agents for FPGA provisioning. Familiarity with VSCode extensions, Eclipse Theia, or building web-based IDEs with performance metric dashboards. Hands-on understanding of FPGA simulator integration, log collection, and profiling using instrumentation frameworks. Knowledge of cloud security best practices, infrastructure cost optimization, and user access controls. Education & Experience: Bachelor s or Master s degree in Electronics Engineering, Electrical Engineering, Computer Engineering, or related fields. 10-15 years of professional experience in technical project/program management with significant exposure to cloud computing and/or FPGA-based systems. What We Offer: The opportunity to lead and shape a globally novel platform for FPGA benchmarking and cloud-based workload execution. Deep collaboration with some of the most talented teams in hardware architecture, AI/ML software, and cloud DevOps. Exposure to a unique combination of semiconductor system design, cloud deployment at scale, and real-world application performance profiling. Apply Now

Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values ; we affectionately refer to it as the Aggregate System and it s won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await! Job Description: o Create System and FPGA designs to exercise all the use models targeted for each product mimicking end applications in a customer setting. o Write system and product level validation plans for new and existing silicon products and projects; execute per plan, record and communicate results o FPGA prototyping and emulation. Understanding spec., writing emulation plan and executing per plan. Record and communicate results. o Understand hardware architectures, use models and system level design implementations required to utilize the silicon features. o Be an effective contributor in a cross-functional team-oriented environment. o Write high quality code in Verilog, VHDL and C code for embedded processors. Maintain existing code. o Learn new system designs and validation methodologies. Understand FPGA architectures. o Be conversant with on-chip debug tool Requirements/Qualifications: Qualifications/Requirements Excellent verbal and written communication skills in English 2+ Years experience in Design with RTL coding in Verilog and VHDL and Verification of RTL Possess an in-depth understanding of hardware architectures, system level IC design implementation, knowledge of how to create end use scenarios Optimizing code for FPGA architectures Experience using Simulation (ModelSim) and Synthesis (Synplicity) tools Basic knowledge of embedded processors such as ARM Cortex-M3 or RISC and familiarity with AMBA protocols APB, AHB, AXI, ACE Working knowledge on embedded software C/C++ is also a plus Strong technical background in FPGA prototype emulation, and debug Strong technical background in silicon validation, failure analysis and debug Excellent Board level debug capabilities in lab environment : hands-on troubleshooting skills for digital logic and analog circuit on PCB s using oscilloscopes, digital analyzers, protocol exercisers and analyzers, integrated logic analyzers (e.g. Synopsys Idenitfy, Xilinx Chipscope, Altera Signalscope, Lattice Reveal Design with RTL coding in Verilog and VHDL is a must Experience using Simulation (ModelSim) and Synthesis (Synplicity) tools Hands-on systems level design and debug experience with at least two of the following high-speed serial communications protocols: i. PCIe Gen1/2/3 ii. Interlaken (10.3125 Gbps) iii. CPRI (614.4Mbps 12.672 Gbps) iv. SGMII or QSGMII v. XAUI or HiGig/+/II vi. 10GBASE-R/-KR vii. Serial Rapid IO Travel Time: 0% - 25% To all recruitment agencies : Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

Skills Required: Strong technical foundation and proven hands-on experience in VLSI, FPGA & VERILOG Ability to guide students in the technologies mentioned. Must be able to confidently explain and simplify complex VLSI, FPGA, VEERILOG concepts for diverse age groups and academic levels. Excellent communication skills in English and Hindi (both verbal and written). Strong planning and time management abilities. Strong public speaking and presentation skills. Comfortable handling large groups and tailoring delivery methods to suit different institutions. Excellent stakeholder management handling clients, academic institutions, and internal teams. Willingness to take up training responsibilities as required. Role & responsibilities Lead Training Sessions: Deliver engaging and practical training sessions covering VLSI , FPGA Development , Verilog HDL, Digital System Design across colleges, schools, and premier institutions . Mentorship & Team Training: Train, guide, and mentor junior trainers from PHN Technology, ensuring content and delivery consistency in VLSI, FPGA, and Verilog. Content Development: Develop and continuously update training materials, live projects, lab exercises, and demos that provide hands-on experience with VLSI design concepts and FPGA implementation. Travel Readiness: Willingness and ability to travel extensively across India for conducting workshops and sessions as per schedule. Preferred candidate profile We are looking for a highly skilled professional with deep expertise in VLSI , FPGA Development , Verilog HDL, Digital System Design The ideal candidate should have a minimum of 5+ years of relevant experience in teaching, corporate training, or industry roles. A strong command over communication (both verbal and written) in English and Hindi is essential, along with the ability to clearly explain and simplify complex concepts to learners across diverse age groups and academic levels. Candidates should possess excellent public speaking and presentation skills , and be comfortable delivering sessions to large groups while tailoring the content as per institutional needs.

We are seeking an experienced Systems Engineer with a strong background in spacecraft electronics, RF systems, and avionics. The role involves contributing across the full spacecraft development lifecycle, from system architecture and integration to testing, launch support, and in-orbit operations. The ideal candidate will combine technical excellence in space-grade electronics with strong collaboration skills to drive mission success. Key Responsibilities Electronics and Avionics Design Design and integrate spacecraft electronics including power distribution systems, avionics subsystems, RF and communication interfaces. Ensure compliance with space-grade standards and robustness under environmental constraints. System Architecture and Integration Conduct trade-off studies and optimize electronics system mass, power, and data budgets. Ensure seamless integration of electronic subsystems with the spacecraft platform. Testing and Validation Lead Hardware-in-the-Loop (HIL) and Software-in-the-Loop (SIL) testing to verify system reliability and performance. Support qualification testing, including thermal, vibration, and EMI/EMC tests. Radiation and Reliability Analysis Evaluate components for space suitability and analyze system reliability in radiation-prone environments. Recommend design changes for improved fault tolerance and robustness. Launch and Operational Support Participate in launch campaigns, in-orbit commissioning, and mission operations support. Documentation and Compliance Develop and maintain Interface Control Documents (ICDs), Concepts of Operations (CONOPS), Verification & Validation (V&V) plans, and detailed design specifications for electronic systems. Qualifications and Skills Education and Experience Bachelors or Masters degree in Electronics, Electrical Engineering, or related field. Minimum 2 years of experience in spacecraft electronics design, integration, or system engineering. Technical Skills Strong understanding of power systems, RF systems, PCB design, FPGA-based systems, and avionics software integration. Experience with EMI/EMC compliance, radiation-hardened design principles, and FMECA/FMEA practices. Proficiency in tools such as MATLAB/Simulink and circuit simulation platforms. Soft Skills Excellent collaboration and communication skills with the ability to coordinate with multidisciplinary engineering teams. Strong analytical and problem-solving abilities. Experience working with external partners and vendors is a plus. Apply for a Systems Engineer Spacecraft Electronics Position Azista BST Aerospace Plot No. 16, Sanand Land Industrial Estate Corporation, Sarkhej-Sanand Road, Ularia, Sanand, Ahmedabad, Gujarat, India - 382 210. Registered Office Sy.No 80-84, Melange Towers, 4th Floor, C Wing, Patrika Nagar, Madhapur, Hyderabad, Telangana, India - 500 081.