775 Fpga Jobs - Page 11

3 years of experience Pre/Post Silicon Validation: Develop and deploy embedded diagnostic software for custom SOCs. Hands-on experience with FPGA, chip bring-up, etc. Expertise in working with and programming different chip peripherals. Hardware bring-up on SoCs, prototyping and emulation systems, Bare Board Bring Up Experience with the development of real-time embedded systems, microcontrollers, FPGAs, and ARM processors Substantial and proven C programming knowledge, CMSIS/Assembly Programming Strong background in highly resource-constrained, real-time, embedded environments Experience some of the popular MCU, e.g., ARM Cortex (M0, M55, A53), RISC-V Experience with various peripherals such as PCIe, USB, SDIO, SPI, I2C, I2S, GPIO, etc. Excellent debugging skills, including proficiency with oscilloscopes, logic analyzers, spectrum analyzers Experience in the use of modern software development tools,

As an intern at our company, you will be responsible for assisting in various recruitment activities. Your day-to-day responsibilities will include sourcing and screening potential candidates, scheduling interviews, and maintaining candidate databases. Additionally, you will help in developing job postings and recruitment materials, as well as participating in job fairs and recruitment events. Your role will also involve providing administrative support to the recruitment team. Our company is dedicated to providing comprehensive semiconductor design services, ranging from RTL & ASIC design to physical design, STA, verification, DFT, circuit design & layout, FPGA, Foundation IP design, PSV, and emulation. We are experiencing rapid growth and boast an exceptional team of technology specialists who bring a competitive advantage, agile mindset, and innovation to tackle technological challenges and drive business transformation. With expertise in electronic design, platform design, automation, embedded systems, and software technologies, we focus on strategizing, innovating, and designing intelligent solutions that enhance product performance and enable seamless connectivity.,

About The Role Project Role : Application Developer Project Role Description : Design, build and configure applications to meet business process and application requirements. Must have skills : Business Process Modeling Good to have skills : NAMinimum 12 year(s) of experience is required Educational Qualification : BTechBE Mechanical Industrial engineer Project Role Description: Summary :Utilize modular architectures, next-generation integration techniques and a cloud-first, mobile-first mindset to provide vision to Application Development Teams. Work with an Agile mindset to create value across projects of multiple scopes and scale. Roles & Responsibilities:-The role of Discrete Event Simulation / Plant Simulation Specialist / Physics simulation/ NVIDIA Omniverse Specialist requires to design, implement, and manage cutting-edge virtual collaboration and simulation solutions and develop simulation models on Plant/production, logistic or warehouse systems processes The Specialist needs to perform What-If scenario and do analysis to reduce waste, increase efficiency, and provide solutions to improve current plant performance and also validate future states/ scenarios Professional & Technical Skills: -Strong communication written and oral and interpersonal skills -Demonstrated ability to handle customers and deliver results when working in cross-functional teams-Strong knowledge in shop floor and discrete industry experience - automotive, consumer goods etc.-Experience in creating material flow simulation, Throughput simulation, Bottleneck analysis, Resource optimization, Inventory reduction and optimization Simulation Models Discrete Event Simulation software for modeling and simulation- Tecnomatix/Siemens Plant Simulation V11, Anylogic, Flex Sim or ANSYS. -Industry Experience/ Knowledge of Automotive, Consumer, Retail Industry Plant and production system knowledge Object oriented programming language Statistical analysis - C, C++, MS Excel VBA-Visual Basic for Applications (VBA) Programming Language, Siemens Tecnomatix Plant Simulation, Nvidia Omniverse.Additional Info:- The candidate should have a minimum of 7 years of experience in Simulation Modeling.- This position is based at our Bengaluru office.- A 15 years full time education is required. (BTech/BE - Mechanical, Industrial engineer) Qualification BTechBE Mechanical Industrial engineer

Job Description Summary We are developing state-of-the-art SoCs from architecture to final product involving automotive centric design methodologies and flows tailored for functional safety. We have a presence across multiple geographies and are currently in search of a Principal level IP/SoC Design Verification Engineer. RESPONSIBILITIES Develop testbenches using System Verilog and UVM for functional and power aware RTL Develop UVM component like agents (active and passive), scoreboards and environment etc., Develop assertions, functional coverage. Develop test plan, UVM based test sequences, layered sequences, virtual sequencers Drive closure of verification metrics to cover verification space. Work with the team to identify and close gaps in functional, power aware and Gate level timing simulation. Develop C testcases for HW-FW simulation and FPGA prototyping Provide regression setup, debug of RTL and gate level netlist Review industry standard spec and augment test plan to improve quality of verification Participate in post silicon bring up, validation and compliance testing and debug Work collaboratively with cross-functional teams like ASIC Architect, ASIC Designers, firmware development team to ensure successful delivery of product MINIMUM QUALIFICATIONS Proven track record of verification, taking several chips from specification to tape out Proven expertise with UVM and/or System Verilog based verification Excellent understanding of ASIC verification methodologies and proven experience of verification Experience working with source control tools, bug management tools and release management tools such as Jenkins, Git, and Jira. Experience with SoC interfaces, embedded processors, networking protocols, security protocols and video formats will be a big plus. Strong written and verbal communication skills and ability to work independently. Bachelors in Electrical Engineering or equivalent and 5+ years of experience

In-depth Knowledge of FPGA Architecture Able to write own RTL custom HDL or drops in IP VHDL, Verilog, System,Verilog, Vivado HLS Xilinx IP, Vivado Block Diagram

You will be responsible for designing Electronics and Embedded hardware systems in compliance with medical device standards such as IEC 60601-1 and IEC 60601-1-2. Your role will involve electronic design and development throughout the complete product life cycle, including conceptual design, feasibility analysis, requirements gathering, architectural design, detailed design, and analysis. You will be working on Analog, Digital, Mixed signal, Circuit Design Schematic, and PCB layout design using tools like Altium or OrCAD. It will be your responsibility to prepare Critical Components list and select certified components for use. You will collaborate and support cross-functional teams from manufacturing and quality control departments. Your tasks will include reviewing and providing feedback on the designs created by other engineers, troubleshooting design-related issues, and implementing necessary changes to ensure the functionality and compliance of the hardware systems. To excel in this role, you should possess hands-on experience in Analog/Digital/Mixed signal & RF Circuit Design. Your expertise should extend to hardware design, development, and testing of high-speed digital electronic circuits involving microprocessors, microcontrollers, FPGA, and embedded firmware. You must have experience in product design, board-level testing, integration, and validation testing, including the development of test plans and Pass/Fail criteria. Proficiency in using Design and simulation tools is essential, along with experience in Hardware Verification to meet IEC 60601 standards. Your troubleshooting skills on Electrical/Electronic boards should be excellent, enabling you to identify root causes and propose effective solutions. Working with multi-disciplinary teams comprising Mechanical, PCB layout, Systems engineering, and suppliers will be a part of your routine. You should have a good understanding and practical use of DFMEA, DFT, and DFM tools, along with experience in FPGA, DSP, and 8/16/32-bit Microcontroller-based circuit design. Familiarity with CRO, function generator, and other electronic analysis and testing tools is required. The qualification needed for this position is a UG degree in B.Tech/B.E in Electronics/Electrical and a PG degree in M.Tech in Electronics/Electrical. Additional knowledge in PCB design guidelines and EMI/EMC testing would be advantageous for this role.,

NK Securities Research is a leading financial firm that leverages cutting-edge technology and sophisticated algorithms to trade the financial markets. Founded in 2011, we have gained invaluable experience in the field of High-Frequency Trading across different asset classes. As an FPGA Developer at NK Securities Research, your primary responsibility will be to design, implement, and rigorously test RTL (Register-Transfer Level) designs to power our high-frequency trading strategies. Your contributions will be instrumental in reducing system latency and enhancing performance, directly influencing trading outcomes. You will be tasked with developing high-performance RTL designs using VHDL or Verilog for FPGA-based systems, optimizing hardware implementations for ultra-low latency and high throughput, and ensuring thorough functional and timing testing of RTL designs to meet specifications. Additionally, you will be responsible for debugging and resolving issues using FPGA debugging tools such as SignalTap, ChipScope, or ModelSim. Collaboration with hardware and software teams to seamlessly integrate FPGA solutions with the Software Trading Stack will be a key aspect of your role. Maintaining clear and comprehensive documentation of designs, test cases, results, and benchmarks is essential to ensure effective communication and knowledge sharing within the team. Preferred qualifications for this role include a Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field from top IITs. Proficiency in VHDL or Verilog/SystemVerilog, hands-on experience with industry-standard tools like Xilinx Vivado, expertise in writing testbenches and conducting simulation-based verification, familiarity with static timing analysis, and proficiency in debugging tools such as SignalTap, ChipScope, or ModelSim are desired. Exposure to high-speed interfaces like PCIe, Ethernet, or DDR, as well as a basic understanding of low-latency design principles and architecture, are considered advantageous. Candidates with a proven track record in delivering high-quality RTL designs, strong analytical and problem-solving skills, and the ability to work independently while collaborating effectively in a team environment are encouraged to apply. In return, NK Securities Research offers a competitive salary package, the opportunity to work in a dynamic and collaborative environment, career growth and development opportunities, catered breakfast and lunch, an annual international trip, and monthly team dinners.,

Job Title: Senior Image Processing Engineer Job Location: Hyderabad, India Job Summary Seeking an image processing engineer to develop and optimize algorithms for real-time medical ultrasound imaging. This position is with an ultrasound company located in the heart of Silicon Valley, USA. You will partner with highly accomplished and deeply technical researchers and engineers focused on delivering innovative ultrasound imaging technologies. The position will also have an opportunity to work directly with the client at their US location. Job Responsibilities Develop and optimize beamforming, image processing, and AI-based signal and image processing algorithms. This will involve the development of Matlab/Python simulation tools, FPGA and/or GPU software routines. Drive the optimization of imaging parameters through numerical Matlab/Python simulations and/or experimental measurements. Proactively interface with the software team to ensure all technical aspects of algorithm development are properly implemented. Minimum Education/Experience Requirements M.S./M.Tech in biomedical/electrical engineering in a field related to signal/image processing or analysis. 4-5 years of industrial experience in development, integration, verification, and optimization of medical imaging systems. Experienced with Matlab and Python or equivalent signal/image processing toolbox. Experience with C/C++ is highly desirable. Experience in Ultrasound is highly desirable. Experience with algorithm development with GPU is a plus. Experience with FPGA programming is a plus. Skills: matlab,beamforming,algorithm development,python,c/c++,ai-based signal processing,image processing,gpu,fpga,

As 5G Presales specialist, you will play a crucial role in presales to enhance sales efficiency, customer engagement, and overall business growth. Responsibilities :- • Respond to a request for information ( RFIs) or request for proposals ( RFPs) from customers. Work on the techno-commercial proposals along with sales and engineering teams. • Create the proposals and WIN those proposals technically and commercially • Provide technical assistance and guidance during the presales process by identifying customers technical and business requirements, prior to designing a solution, consulting with technical teams about capabilities, and supporting business sales teams, account managers and partners on proposal activities. • To attend meetings with potential Clients to determine technical and business requirements and ensuring that all necessary information is collated prior to producing a solution • Promote cross selling and upselling with sales teams. • Create and confidently deliver technical presentations internally and externally • Able to understand business drivers and risks involved to the customer • To structure and produce compelling technical proposals/commercial and technical documentation • Ability to demonstrate products and technologies effectively and articulate the proposals Skills- • Technical Domain Experience in latest Digital Technologies including FPGA, RFSOC, 5G/Antenna • Must be familiar with product design process e.g Product Development Lifecycle and SDLC • Must be familiar with RAN products and Software e.g. RU internal architecture, DU internal architecture , RANProtocol Stack etc. • Experience in cost estimation, technical architecture and engineering proposals that meets client's requirement. • Previous experience of requirements gathering, design and solution building and the ability to replicate this in a commercial setting • Good communication skills • Builds productive relationships internally and externally, fostering teamwork by keeping colleagues updated on activities.

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience. 10 years of work experience in RTL design. Experience with ASIC design methodologies for clock domain checks and reset checks. Experience in RTL coding using System Verilog/Verilog. Preferred qualifications: Master's degree or PhD in Electrical Engineering or Computer Science. Experience in area, power and performance design optimization. Experience implementing Machine Learning Accelerators, Camera ISP image processing IP, or other multimedia IPs such as Display or Video Codec. Experience in scripting languages, C/C++ programming and software design skills. About the job Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology. Responsibilities Provide microarchitecture definition for Core IP hardware designs and subsystem/ASIC top-level integration. Define and develop Register-Transfer Level (RTL) implementations that meet engaged power, performance and area goals. Perform RTL coding, function/performance simulation debug and Lint/CDC/FV/UPF checks. Participate in synthesis, timing/power closure, and FPGA/silicon bring-up. Participate in test plan and coverage analysis of the sub-system and chip-level verification. Create tools/scripts to automate tasks and track progress. Work with multi-disciplined and multi-site teams in RTL design, verification, or architecture/micro-architecture planning.

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience 4 years of experience with digital design in ASIC. Experience in RTL design utilizing Verilog/System Verilog with ARM-based SoCs, interconnects, and ASIC methodology. Experience in a scripting language, such as Python or Perl. Preferred qualifications: Master's degree or PhD in Electrical Engineering, Computer Science, or equivalent practical experience. Experience with AMBA (Advanced Microcontroller Bus Architecture) protocols. Experience with methodologies for RTL quality checks (e.g., Lint, CDC, RDC). Experience with methodologies for low power estimation, timing closure, synthesis. Experience with a scripting language like Python. About the job Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Responsibilities Define microarchitecture details including interface protocols, block diagrams and data flow. Perform RTL quality checks such as Lint, CDC, and Synthesis checks. Participate in synthesis, timing/power estimation, and FPGA/silicon bring-up. Collaborate within a team to develop and deliver optimized interconnect blocks and subsystems. Coordinate with architecture, design verification, and implementation teams to ensure specification adherence and Communicate and work with multi-disciplinary and multi-site teams.

Minimum qualifications: Bachelor s degree in Electrical/Computer Engineering or equivalent practical experience. 2 years of experience with RTL design using Verilog/System Verilog and microarchitecture. Experience in ARM-based SoCs, interconnects and ASIC methodology. Preferred qualifications: Master s degree in Electrical/Computer Engineering. Experience with methodologies for RTL quality checks (e.g., Lint, CDC, RDC). Experience with methodologies for low power estimation, timing closure, synthesis. About the job Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. As part of our platform IP team, you will be a part of a team that designs foundation and chassis IPs (NoC, Clock, Debug, IPC, MMU and other peripherals) for Pixel SoCs. You will collaborate with members of architecture, software, verification, power, timing, synthesis, etc. to specify and deliver quality RTL. You will solve technical problems with innovative micro-architecture, low power design methodology and evaluate design options with complexity, performance and power. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Responsibilities Define microarchitecture details such as interface protocol, block diagram, data flow, pipelines, etc. Perform RTL development (SystemVerilog), debug functional/performance simulations. Perform RTL quality checks including Lint, CDC, Synthesis, UPF checks. Participate in synthesis, timing/power estimation, and FPGA/silicon bring-up. Communicate and work with multi-disciplined and multi-site teams.

Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Software Engineer, you will design, develop, create, modify, and validate embedded and cloud edge software, applications, and/or specialized utility programs that launch cutting-edge, world class products that meet and exceed customer needs. Qualcomm Software Engineers collaborate with systems, hardware, architecture, test engineers, and other teams to design system-level software solutions and obtain information on performance requirements and interfaces. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. 2+ years of work experience with Programming Language such as C, C++, Java, Python, etc. Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in. GENERAL SUMMARY As a SoC RAS and Manageability Controller FW Developer, you are responsible for working with a team on the enablement of the SoC and Platform management solution for Qualcomm's upcoming products. You will collaborate internally to help define and implement embedded firmware to manage the error, debug and telemetry management features for the Qualcomm SoCs across many verticals. You will also participate in various other aspects of the management controller firmware development, including power management, boot, RAS, debug, security and runtime services. In SoC Management Controller FW developer role you will be working closely both with the hardware and firmware development teams. You will have an opportunity to engage with third parties on enablement of new platforms, as well as providing input to our SoC and platform architects on future designs. Role and Responsibilities Drive the complete firmware development lifecycle through design, development, debug and verification, in pre-silicon and post-silicon environments. Develop core firmware stack, utilizing and RTOS, that provides the essential services and frameworks to various algorithms running on the power management controller. Assist in defining Reliability, Availability and Serviceability solutions for future generation of Qualcomm CPUs. Actively engage with open source communities to contribute support for processor architectures, device drivers, and firmware features Collaborate with team members and other teams on silicon and platform bring-up, debug and diagnostics. Assist in identifying skills requirements and in hiring engineers, Preferred Qualifications BS/BEng in Electrical, Computer Engineering, or Computer Science (or equivalent professional experience) with 8 years experience in embedded firmware development Familiarity with Error reporting and manageability requirements on a datacenter server platform. Familiarity with ARM RAS specification, ARM CPU RAS extensions, and Software components (SDEI, APEI, UEFI CPER) specifications is preferred. Self-starter who takes initiative and brings technical leadership Proficient writing and debugging C and assembly Driver development experience in RTOS or OS Kernel environments Demonstrated development experience with embedded OSes such as Zephyr, eCos, uC/OS or FreeRTOS Experience developing and debugging in pre-silicon environments including simulators and FPGA emulation Experience defining interprocessor communication interfaces between embedded controllers and the platform Familiarity with ARM v8 architecture. Development experience for a ARMV8 platform is a plus. Physical Frequently transports between offices, buildings, and campuses up to mile. Frequently transports and installs equipment up to 5 lbs. Performs required tasks at various heights (e.g., standing or sitting). Monitors and utilizes computers and test equipment for more than 6 hours a day. Continuous communication which includes the comprehension of information with colleagues, customers, and vendors both in person and remotely. Minimum Qualifications Education Bachelors - Computer Science, Bachelors - Engineering, Bachelors - Information Systems Work Experiences 4+ years experience with Programming Language such as C, C++, Java, Python, etc. ,8+ years of Software Engineering or related work experience

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: GPU Design and micro-Architect who will work across functions like GPU architecture and Systems in design and micro-architecture of the next generation GPU features. Work very closely with Architecture teams to come up with micro-architecture and hardware specification for features Design and RTL ownership Work very closely with Design Verification teams to review test plans and sign off the validation of all design features across products Work closely with physical design teams to achieve the right power, performance and area metrics for the GPU blocks Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

. Responsibilities You will be part of this platform team, responsible for developing platform software in the areas of: Board bring-up related experience. 10G, 40G, 100G, 400G, 800G interface related platform software like interface drivers, etc. Platform infrastructure-related software like Routing Engine Redundancy/High Availability, Chassis/line card, fabric, Optics, etc. Timing software in PTP, SYNCE & Grand Master You will be responsible for these product developments in the platform area in either JunOS or Junos evolved software architecture. In addition to the development activity, you are required to work closely with system and solution test teams to ensure products/solutions delivered are of the highest quality. You will be required to work closely with Juniper Technical Assistance Team for providing engineering assistance in supporting critical customer escalations for customer deployments. Requirements BTech / MTech in CS/CE or related field with proven experience. Good understanding of hardware-level details for Optics, PCIe, SPI, I2C, Retimers, FPGA, CPLD, MDIO, Flash Driver Proficiency with device drivers, system bring-up, FreeBSD/Linux internals. Understanding of Ethernet, OTN, SONET, etc. technologies. Strong technical, analytical, and problem-solving skills. Strong in C, C++ programming, OO analysis & design, data structures, and system debugging skills. Prior software development experience on networking products.

NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a learning machine that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life s work , to amplify human creativity and intelligence. As an NVIDIAN, you ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join our diverse team and see how you can make a lasting impact on the world! NVIDIA is seeking best-in-class Senior SoC/CPU Verification Engineer to verify the worlds most powerful CPUs/Socswith AI capabilities for self-driving cars, gaming consoles & other automated machines (see NVIDIA Grace CPU and Arm Architecture | NVIDIA). NVIDIA is a learning machine that constantly evolves by adapting to new opportunities that are hard to pursue, that only we can take on, and that matter to the world. We have crafted a team of excellent people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. What you ll be doing: Work alongside brilliant engineers on NVIDIAs next generation CPU Verify micro-architecture/architecture features at unit level or subsystem or full chip testbenches including FPGA/Silicon Partner with CPU architects in crafting verifiable designs. Working on full stack development - from verifying sequences at SW simulator level, to getting the overall end-to-end sequence working on silicon with a full SW stack. What we need to see: Strong verification fundamentals and are able to juggle working on SW simulators vs Silicon Proficiency in CPU architecture (ARM knowledge is desirable), Verilog, System Verilog and possess strong debugging skills. 5+ years of experience with Bachelors/Masters in Computer Science or Electronics Engineering or equivalent experience Ways to stand out from the crowd: Worked on various pieces of CPU unit/microarchitecture verification You have worked on complex coverage driven verification projects Experience of collaborating with geographically diverse multi-functional teams With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world s most desirable employers. We have some of the most resourceful and versatile people in the world working for us and, due to outstanding growth, our best-in-class engineering teams are rapidly growing. If youre a creative and autonomous engineer with a real passion for technology, we want to hear from you. #LI-Hybrid

Amazon Lab126 is an inventive research and development company that designs and engineers high-profile consumer electronics. Lab126 began in 2004 as a subsidiary of Amazon.com, Inc., originally creating the best-selling Kindle family of products. Since then, we have produced groundbreaking devices like Fire tablets, Fire TV and Amazon Echo. What will you help us create? The Role: As a Senior RTL Design Engineer, you will be part of an advanced architecture team that is exploring new hardware designs to improve our devices. In this role, you will be responsible for defining the micro-architecture and implementing the corresponding RTL for advanced functional blocks. You will participate in the design verification and bring-up of such blocks by writing relevant assertions, debugging code, test benches, test harnesses, and otherwise interacting with the extended team. You will participate in the lab bring-up of these blocks either in an FPGA or silicon by potentially writing test scripts, analyzing lab data, proposing experiments, etc. You will work closely with multi-disciplinary groups including Product Design, Audio Technology, Computer Vision, Hardware Engineering, and Software Engineering, to architect and implement complex functional block that enable development of world-class hardware devices. In this role, you will: Design world class hardware and software Communicate and work with team members across multiple disciplines Develop detailed design specifications and documentation Perform RTL coding and synthesis Work with Partners/Supplier to optimize and customize their products Run industry standard code quality tools and fix issues found by them Participate in test plan and coverage reviews The ideal candidate should have experience with RTL development environments, fluency in modern hardware description languages. They should have developed complex IP blocks from scratch that have successfully been integrated in SOCs or other such silicon that have been productized in consumer devices. They should be familiar with modern SoC architectures, various interconnect topologies such as AMBA AXI, APB, AHB, and implementations. Experience with I/O interfaces such as SPI, I2C, I2S, PDM, and MIPI CSI/DSI/Slimbus/Soundwire is preferred. Experience with memory instantiation and memory compilers is also preferred. We are looking for a self-driven individual who can work with architects, HW and SW developers and can quickly resolve blocking issues. If you have the required skills and experience, we encourage you to apply for this exciting opportunity to join our growing hardware design team. Masters degree in Electrical/Computer Engineering or related field 7+ years of RTL development experience with a record of taping out production silicon Experience with design development using Verilog/SystemVerilog Experience in defining micro-architecture from architecture guideline and model analysis. Experience in performance/power/area analysis and trade-offs Proficient in design methodologies and EDA tools Experience working with Synthesis, timing closure, and design constraints Excellent problem-solving and debugging skills Ability to work collaboratively in a team environment and communicate technical ideas effectively PhD in Computer Science, Electrical Engineering, or related field Experience with design of video/graphics pipeline and image processing algorithms Familiarity with display panel and display driver IC technologies Experience with ARM and various DSP ISA Experience debugging system-level issues Experience in entire design flow from architecture to final silicon. Good programming skills in C/C++ and scripting skills in Python, Tcl, and/or Perl 10 years or more of practical experience Experience with wide variety of low power design techniques Working experience with high performance industry standard buses like AMBA AXI4 Experience in integrating third party IP blocks, building top level modules, defining clock domains and power domains Large breadth of knowledge from architecture through physical design Knowledge of FPGA and emulation platforms Knowledge of SoC architecture Excellent verbal and written communication skills

: 2025-06-18 Country: India Location: North Gate Business Park Sy.No 2/1, and Sy.No 2/2, KIAL Road, Venkatala Village, Chowdeshwari Layout, Yelahanka, Bangalore, Karnataka 560064 Overview: Hardware Product Design activities for Power and Controls SBU (EPS and EACS Businesses) needs a proficient Analog and Digital Designer who has expertise designing for DO-160 and testing and corelating the same and also has strong understanding of EMI/EMC, signal integrity, and hardware design principles who can support in GETC- EDTC qualification activities In this role the Principal Engineer independently own different phase of Hardware Development cycle of Airborne Electronic Hardware development. Mentoring the team and owning HW development cycle as per RTCA DO-254 / EUROCAE ED-80, Design Assurance Guidance for Airborne Electronic Hardware. Position: Principal Engineer (P4) Primary Responsibilities: Expert in Design, Analysis, Testing and Qualification of mixed signal Hardware Systems. Expert in reviewing the deliverables and provide technical guidance to the team. Understanding of DO-254 (Design Assurance Guidance for Airborne Electronic Hardware) process for hardware life cycle. Strong technical capability to lead Hardware Life Cycle Activities (Requirements development, Detailed Design and Specification, Test Plan and Procedure, Verification and Certification documents). Perform board level thermal, signal/power integrity, EMI/EMC simulation, to refine design before the prototype phase, ensuring the highest quality of output. Strong capability to work on technologically complex system with risk taking abilities, championing of new ideas and lead the product development from concepts to reality. In depth understanding of FPGA hardware design and verification for Aerospace Products Proficient in usage of DOORS for requirement management. Knowledge of PCB Layout guidelines to meet EMI/EMC tests, provides board layout guidelines to PCB designers. Board level and system level testing Experience. Designs innovative solutions to complex problems Ability to break-down activities in sub-tasks and milestones to adhere to timelines and to respect budget constraints. Work closely with cross-functional teams to ensure seamless integration of hardware components with other system parts, facilitating a cohesive and functional product. Should have excellent troubleshooting skills on electrical/electronic systems to find root cause and resolve the issues. Lead the evaluation, troubleshooting, and debugging of hardware prototypes. Identify the root causes of failures and implement corrective actions. Oversee the creation and maintenance of technical documentation. Release and sustain system board designs in TeamCenter. Experience in Electrical CAD tools (Pspice, Allegro, LTspice, Mathcad, Matlab-Simulink) Ability to Create and review the test reports from conducted test data of DO-160 Tests. Basic Qualifications: BE/BTech or Masters degree in Electrical or Electronics and Communications Engineering. 12 - 17 years of relevant industry experience with at least 6 years as an Electrical Engineer performing ED Analysis and Testing for DO160 certification (Static Timing Analysis, Stress, Power Summary, Signal Integrity and Power Integrity along with HW requirements management, HW verification and validation). Ability to interpret customer s requirement and estimate the work for the technical solution. Capability to lead the critical design reviews with global stakeholders and customer audits. Hands on experience with Lab tools and debugging (CRO, Signal generators, logic analyzer and environmental testing equipment s, code optimization, timing analysis, CPU loading, digital circuits, hardware software integration etc) Preferred Qualifications: Experience in DO254 and DO160 Certification process by supporting SOI 1 to SOI 4. Experience in FPGA/ASIC and Hardware design development. Able to create the Test Plans and Procedures for HW. Competencies Shall possess strong written and verbal communication skills in English Shall be able to coach/mentor the junior level professionals Shall be a very good listener & a very good team player Shall be curious to learn always, result oriented & forward looking Shall be able to work with a sense of urgency & under ambiguous conditions Shall possess high degree of ownership & accountability Shall be very good at analytical thinking and problem solving . The high-quality products we design, test and produce in our Advanced Structures business help millions of passengers reach their destinations safely - every day! From nacelles, landing systems, flight controls and actuation to propellers- the products we manufacture work together behind the scenes to enhance the overall flight experience. We delight our customers with superior products and best-in-class service. Our global team is committed to continuous improvement - we work hard to make our solutions lighter-weight, stronger and more technically advanced, so that plane travel can be safer, more affordable, and more sustainable in the years to come. We are looking for the best and brightest to fly and land with us! WE ARE REDEFINING AEROSPACE. Some of our competitive benefits package includes: Transportation facility. Meal coupons Group Term Life Insurance. Group Health Insurance. Group Personal Accident Insurance. Entitled for 18 days of vacation and 12 days of sick leave annually. Employee scholar program Work life balance Car lease program National Pension Scheme LTA Fuel & Maintenance /Driver wages Meal vouchers And more! Nothing matters more to Collins Aerospace than our strong ethical and safety commitments. As such, all India positions require a background check, which may include a drug screen. At Collins, the paths we pave together lead to limitless possibility. And the bonds we form - with our customers and with each other -- propel us all higher, again and again. Apply now and be part of the team that s redefining aerospace, every day .

Job Title Firmware and Controls Designer Job Description You have the opportunity to be part of an exciting team and contribute to the design, development and maintenance of Magnetic Resonance Imaging (MRI) systems. In this role of Firmware and Controls Designer , you are responsible for the development and maintenance of MR Hardware Subsystems/Components and will gain substantial knowledge of complex systems in medical imaging environment. Together with a multidisciplinary team of engineers, you play a crucial role in getting these systems/sub-systems to the required performance, by owning the design, development, testing, and maintenance of embedded systems and safety/mission critical embedded software and firmware, that control various functions of MRI sub-systems. This requires broad orientation, conceptual skills and a can do mentality, keeping abreast with all trends and advancements in technology and medical imaging. You are a part of Hardware Engineering Group under MRI Business, located at Philips Healthcare Innovation Centre (HIC) Pune. HIC is playing a key role in Philips global strategy for Diagnostic Imaging. With Philips HIC, the foundation was laid to touch billions of lives and reiterate Philips commitment towards healthcare growth markets You are responsible for : Requirements, design, implementation, test and integration of module/sub-system in accordance with the higher-level architectural requirements and design specifications Ensuring that the design is consistent with the higher-level architecture and requirements Ensuring that the proposed design would have the safety, reliability and quality features built-in Responsible for ensuring that the design meets the performance, quality and cost criteria Conduct concept and feasibility studies. Leads the introduction of new technologies Ensuring that there is proper documentation per standards for the developed design Ensuring the mutual consistency and efficient integration of the separate components in modular design that meets the product specification Ensuring that his design modules meet the product certification requirements Drawing up personal schedule and reports on progress Defining and assessing the Work Breakdown Structure/planning/costs of his/her area Being abreast of technical developments in own field through study of literature and technical contacts Mentoring/guiding/hand-holding young engineers in the team and helping them ramp-up well Maintaining product and company reputation by complying with country specific regulations To succeed in this role, you should have the following skills and experience: Completed engineering studies at University level; BE/BTech/ME/M-Tech in Electronics or Electrical Engineering, with 8 to 12 years of experience Experience in complete life-cycle management of embedded software, preferably for medical products Expert in C, C++ and other embedded programming languages Proficient in hardware description languages like VHDL, Verilog etc. Knowledge of Software Design Life Cycle (SDLC) Good knowledge of modern OS coding techniques, IP protocols and hardware interfaces Experience in 16/32-bit microcontroller-based design and programmable devices (FPGA/CPLD/SoC etc.) and their interface Knowledge of communication interfaces like RS232, RS485, CAN, EtherCAT, Ethernet and USB Hands-on experience in developing control software for close-loop systems in a mechatronics environment Hands-on experience in using simulation and implementation tools such as MATLAB and SIMULINK Solid knowledge of digital signal processing and control theory Excellent debugging skills - ability to understand and debug problems across hardware/software boundaries Experiences in real-time operating systems Experience in printed circuit board bring up and testing Knowledge of software tests and static code analyses Knowledge of firmware development environments such as IAR or Eclipse as well as version control systems like GIT Should have experience in DFMEA and design of Fail-Safe Systems and Sub Systems Experience in design of a communication gateway will be an added advantage. Knowledge of IEC 60601 standards will be an added advantage Knowledge of Global Medical Quality and Regulatory Standards e.g. IEC, FDA, UL, CE, CSA etc. Hands-on experience with tools like Agile, Clear-quest, Windchill or equivalent Disciplined team worker, ability to work independently Result oriented team player Ability to present and articulate ideas to key stakeholders and leadership team Excellent communication skills and Positive can do attitude Quality mindset in design and documentation Global and Cross-functional Experience/Skills in a Matrix Organization will be an added advantage. If you re interested in this role and have many, but not all, of the experiences needed, we encourage you to apply. You may still be the right candidate for this or other opportunities at Philips. Learn more about our culture of impact with care here .

NVIDIA is seeking passionate, highly motivated, and creative senior design engineers to be part of its Graphics team working on the design of state of the art memory subsystem components used in their industry-leading Graphics Processors. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. In this position, you will be expected to make architectural trade-offs based on features, performance requirements and system limitations, come up with micro-architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean design. You will work with architects, other designers, pre- and post-silicon verification teams, synthesis, timing and backend teams to accomplish your tasks. What you ll be doing: Own micro-architecture and RTL development of design modules. Micro-architect features to meet performance, power and area requirements. Work with HW architects to define critical features. Collaborate with verification teams to verify the correctness of implemented features. Co-operate with timing, VLSI and Physical design teams to ensure design meets timing, interface requirements and is routable. Interact with FPGA and S/W teams to prototype the design and ensure that S/W is tested. Work on post-silicon verification and debug. What we need to see: BS / MS or equivalent experience. 5+ years of design experience. Experience in RTL design of complex design units for at least two or three projects. Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB). Deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug. Expertise in Verilog. Ways to stand out from the crowd: Design experience in memory subsystem or network interconnect IP. Good debugging and problem solving skills. Scripting knowledge (Python/Perl/shell). Leadership experience in leading small 2-3 member teams. Good interpersonal skills and ability & desire to work as a part of a team. NVIDIA is widely considered to be one of the technology world s most desirable employers. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you. #LI-Hybrid

About the Company Qbit Labs is an R&D company offering design solutions and services in the wired and wireless communication fields, catering to defense, aerospace, and space-grade products. It has deep expertise in the design of protocol analyzers/exercisers for PCIe, CXL, MIPI, Ethernet, TSN, etc. Thanks to its strong scientific research and innovation, the company holds a niche and strong product portfolio in each operation domain. Job Description: You will be responsible for the design of complex micro-architecture optimized for specific FPGA applications. Integrating FPGA designs with other hardware and software components within a larger system. Conducting the feasibility of the FPGA solutions for a given application. Desired Skills and Experience: Experience in Logic design/micro-architecture / RTL coding is a must. Expertise in VHDL/Verilog/SV is a must. Optimize FPGA designs for speed, power consumption, and resource utilization. Board bring-up and integration with SW and HW components. Understanding of protocols PCIe/USB/Ethernet/ Wireless Communication etc. Hands-on experience in Multi Clock designs, Asynchronous interface To Apply: Please share your resume on anjali.sharma@qbitlabs.co.in with the details requested below- Notice Period- Current Location- Permanent Location- Current/ Last CTC- Expected CTC- Total Experience- Relevant Experience- Are you serving Notice Period? If Yes- what's the last working day- Any offer in Hand? Preferred Location(Gurugram or Hyderabad)- Experience: 3 to 5 Years Job Domain: Telecommunication wired and wireless Job Type: Permanent Job Location: Gurugram/ Hyderabad Company: Qbit Labs Private Limited

Hello Candidates, Greetings from Hungry Bird IT Consulting Services Pvt. Ltd. We are hiring for VHDL / FPGA Engineer for one of our client. Job Title: VHDL / FPGA Engineer Location: Jublihills, Hyderabad Job Summary: Our client, We are seeking a highly skilled and motivated FPGA / VHDL Engineer to join our team in designing high-performance digital blocks for advanced communication coding systems. The ideal candidate will have strong expertise in RTL design using VHDL, along with hands-on experience in simulation, synthesis, timing closure, and SoC integration, especially using Xilinx Vivado and Zynq SoC platforms. Responsibilities: Design and implement high-performance digital blocks for complex communication coding using VHDL. Perform RTL development including writing, simulating, debugging, and verifying VHDL code. Develop and apply timing constraints, and perform timing analysis using state-of-the-art tools like Xilinx Vivado. Create and maintain testbenches for module-level and system-level verification. Participate in architectural design, specifications, and documentation for FPGA modules. Conduct block and top-level design verification to ensure correctness and compliance. Work on SoC integration, including processor cores and standard peripheral interfaces. Debug complex issues at the HDL level and drive root cause analysis and resolution. Collaborate cross-functionally with hardware and embedded software teams. Ensure design quality, performance, and reusability across projects. Required Skills: Strong experience in VHDL-based RTL design and verification. Proficient in using simulation tools and writing efficient testbenches. Hands-on experience with Xilinx Vivado, including synthesis, implementation, and timing closure. Experience with developing and debugging timing constraints (XDC). Exposure to communication protocols and coding algorithms is highly desirable. Solid understanding of SoC architectures, particularly Xilinx Zynq SoC. Experience in integrating processor cores (e.g., ARM) with standard peripherals. Proven ability to debug complex HDL designs and resolve functional and timing issues. Strong documentation and communication skills. Preferred Qualifications: Experience with other HDLs (e.g., Verilog), scripting languages (TCL, Python). Familiarity with version control systems like Git. Knowledge of high-speed interfaces and memory subsystems. (Interested candidates can share their CV to aradhana@hungrybird.in or call on 9959417171.) Please furnish the below-mentioned details that would help us expedite the process. PLEASE MENTION THE RELEVANT POSITION IN THE SUBJECT LINE OF THE EMAIL. Example: KRISHNA, HR MANAGER, 7 YEARS, 20 DAYS NOTICE Name: Position applying for: Total experience: Notice period: Current Salary: Expected Salary: Thanks and Regards Aradhana, +91 9959417171.

Job Title : C++ Developer - SNORT & Compiler Design Location : Bangalore Experience : 8 to 12 Years Employment Type : Full-Time Job Overview : We are looking for an experienced C++ Developer with deep expertise in SNORT rule sets, compiler development, and FPGA-accelerated processing. This role requires a strong foundation in system-level programming, along with the ability to work on performance-critical data path processing for network security applications. Key Responsibilities : - Design and develop a C++/C-based compiler to convert SNORT rule sets into state tables - Implement regex lookup engines integrated with FPGA-based acceleration - Optimize rule parsing, conversion logic, and data path evaluation pipelines - Collaborate with hardware (FPGA) teams to align on rule engine performance - Handle result processing logic for high-speed data inspection - Ensure software meets security, latency, and throughput requirements - Communicate directly with the client for requirement gathering and technical clarifications Requirements : - 8 - 12 years of experience in C++/C development, with strong system-level programming skills - Hands-on experience with SNORT rule sets, IDS/IPS systems, or similar network security tools - Experience in compiler or parser development, preferably with experience in state machine generation - Good understanding of regular expressions, pattern matching, and performance optimization - Exposure to FPGA-accelerated architectures and hardware-software interfacing is a plus - Excellent analytical, debugging, and communication skills - Ability to interact effectively with clients and cross-functional teams Preferred Skills : - Familiarity with network protocols and deep packet inspection - Experience with rule optimization, rule merging, and traffic flow classification - Prior experience in cyber security product development or telecom network systems

Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: We are seeking a highly skilled and experienced Debug IP Design Engineer/Microarchitect to focus on the development of Debug IPs. The ideal candidate will have a strong background in IP design, verification, and delivery, with specific expertise in CoreSight IP design. Key Responsibilities: Debug IP Design: Focus on the design and development of CoreSight based Debug IPs, ensuring they meet the required specifications and performance standards. RTL Design: Utilize your experience in RTL design for complex SoC development using Verilog and/or SystemVerilog to create efficient and reliable IPs. Arm-Based Designs: Apply your knowledge of Arm-based designs and/or Arm System Architectures to develop and optimize IPs. Collaboration: Work closely with cross-functional teams, SoC integration & Architecture teams to ensure successful IP delivery within the specified timelines. Quality Assurance: Implement rigorous verification processes to ensure the IPs meet all functional and performance requirements. Qualifications: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. Experience: Proven experience in RTL design for complex SoC development using Verilog and/or SystemVerilog. Arm Expertise: Strong understanding of Arm-based designs and/or Arm System Architectures. Technical Skills: Proficiency in IP design, verification, and delivery, with a focus on Debug IPs. Communication: Excellent communication and collaboration skills to work effectively with cross-functional teams. Preferred Skills: Experience with CoreSight based Debug IP design. Strong problem-solving and analytical skills Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Responsibilities Front-End implementation of SERDES high speed Interface PHY designs RTL development and its validation for linting, clock-domain crossing, conformal low power and DFT rules. Work with functional verification team on test-plan development and debug. Develop timing constraints, deliver synthesized netlist to physical design team, and provide constraints support for PD STA. UPF writing, power aware equivalence checks and low power checks. DFT insertion and ATPG analysis for optimal SAF, TDF coverage. Provide support to SoC integration and chip level pre/post-silicon debug. Skills & Experience MTech/BTech in EE/CS with hardware engineering experience of 4 to 7 years. Experience in micro-architecture development, RTL design, front-end flows (Lint, CDC, low-power checks, etc.), synthesis/DFT/FV/STA. Experience with high-speed interface design and good understanding of Industry standard protocols like USB/PCIe/MIPI, etc. is desirable. Experience with post-silicon bring-up and debug is a plus. Able to work with teams across the globe and possess good communication skills.