Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. General Summary PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains"“ LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux "“ Perl/TCL fundamentals/scripting Principal Duties and responsibilities Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications "¢ 5+ years Hardware Engineering experience or related work experience. "¢ 5+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: The candidate would be joining a team with deep expertise in designing IP for wireless sub-systems for market leading products. In this role, the candidate would be working on connectivity solutions for mobile phones, wearables, IOT and Mobile Infrastructure chips. The candidate would be a part of Bluetooth IP Design team and will be involved in IP and sub-system development. The role requires working on the latest technology nodes on all aspects of the VLSI development cyclearchitecture, micro architecture, RTL design and integration. Close interactions with system architecture, verification, SoC Design, Validation, Synthesis & PD teams are required for design convergence. Skills/Experience 2-6 years of experience in the design of complex ASICs Strong expertise in RTL coding of complex designs using Verilog/SV Exposure to low power design methodology and designs with multiple clock domains Strong debugging, analytical skills and strong communication skills, both verbal and written Hands-on experience in front-end design tools Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Role Senior C++ Developer - High-Performance Trading Systems (Qt Expertise) What We Expect - 4+ years of experience in C++ development, specializing in high-performance, low-latency systems. - Deep expertise in modern C++ (C++14/17/20), multithreading, and concurrency. - Strong Qt development experience for building real-time, high-performance trading UIs. - Experience building ultra-fast order execution engines, market data feeds, and real-time risk management tools. - Strong understanding of networking protocols (TCP/IP, UDP, FIX) and inter process communication (IPC, shared memory, message queues). - Hands-on experience with latency optimization, performance tuning, and profiling tools (perf, Val grind, gprof, etc.). - Proficiency in memory management, lock-free programming, and CPU cache optimization. - A deep understanding of exchange connectivity, order matching engines, and algorithmic trading systems. - A hacker mentality-you love solving problems that seem impossible. What You Will Do - Architect, develop, and optimize ultra-low-latency C++ trading applications that handle millions of transactions per second. - Build high-performance market data processing solutions with microsecond-level latencies. - Develop real-time, intuitive, and high-speed trading interfaces using Qt. - Work on exchange connectivity, FIX protocol integrations, and risk management systems. - Profile and optimize code to achieve maximum throughput and minimal latency. - Solve some of the hardest engineering problems in fintech alongside an elite team. - Experiment with new technologies to stay ahead of the competition. - Own your work end-to-end-from concept to deployment, pushing the limits of what's possible. Must-Have Skills - 4+ years of experience in C++ development, specializing in high-performance, low-latency systems. - Deep expertise in modern C++ (C++14/17/20), multithreading, and concurrency. - Strong Qt development experience for building real-time, high-performance trading UIs. - Experience building ultra-fast order execution engines, market data feeds, and real-time risk management tools. - Strong understanding of networking protocols (TCP/IP, UDP, FIX) and inter process communication (IPC, shared memory, message queues). - Hands-on experience with latency optimization, performance tuning, and profiling tools (perf, Val grind, gprof, etc.). Nice-to-Have Skills - Experience in high-frequency trading (HFT), market-making, or ultra-low-latency environments. - Knowledge of exchange matching algorithms, order routing strategies, and market microstructure. - Contributions to open-source C++ and Qt projects or performance-critical software. - Expertise in hardware acceleration (FPGA, SIMD, AVX, GPU computing). - Familiarity with cloud-based trading infrastructure and hybrid on-prem/cloud systems. Why Join Us - Be part of a high-energy startup with massive growth potential. - Work with visionary fintech leaders and top-tier engineers. - Build industry-defining products that will shape the future of trading. - A culture that values > - Competitive compensation and a real opportunity to lead and innovate. Apply Insights Follow-up Save this job for future reference Did you find something suspiciousReport Here! Hide This Job Click here to hide this job for you. You can also choose to hide all the jobs from the recruiter.

Work Profile : - Work on development of custom Analog circuit boards for applications related to RF, interfaces etc. - Implement new features and bug fixes - Verify analog/mixed-signal integrated circuits - Develop test cases to verify new features and bug fixes - Review and update the user manuals for software tools. - Supporting digital modelling of analog circuits for mixed-signal verification - Creating design specifications and circuit schematics - Work both independently and in a team environment, with the opportunity to provide technical leadership to other members of the engineering team - Create and/or modify specification documents detailing system design and enhancements to meet marketing requirements - Collaborate with others in the creation of technical reports, whitepapers, and user documentation Requisites : - EE/EEE/ECE graduate, undergraduate degree from reputed Tier 1 or Tier 2 colleges . - Strong knowledge of analog integrated circuit design fundamentals - Proven experience taking designs from concept to production - Experience in analog/mixed-signal IC design & verification - Understanding of BJT, CMOS and Op-Amp technologies. - Good understanding of analog/mixed-signal design flows (Cadence, Synopsys) - Transistor and system level simulation skills - Discrete time and continuous time signal processing skills - Strong lab and silicon validation skills - Verilog based digital design and test bench development, is a plus - Strong communication skills, both written and verbal

Performance modelling and evaluation of ACAP workloads to eliminate bottlenecks as early as possible and guide the architecture of future generation devices. This is a challenging role in the FPGA Silicon Architecture Group in AECG business unit of AMD in Hyderabad. ABOUT THE TEAM: AECG group in AMD designs cutting edge FPGAs and Adaptable SOCs consisting of processor subsystems and associated peripherals, programmable fabric, memory controllers, I/O interfaces and interconnect. KEY RESPONSIBILITIES: Modelling and simulation of workload dataflow networks and clock accurate SOC components. Performance analysis and identification of bottlenecks Quick prototyping, long-term design decisions, and exploring novel architectures Enhancement of the existing tools and knowledgebase Collaborating with architects in the development of next generation devices Collaborating with customer facing teams to identify scope of optimization for future market scenarios Breaking down system level designs into simpler dataflow models and identify bottlenecks, capture memory and communication overheads Knowledge sharing with teammates through thorough documentation PREFERRED EXPERIENCE: Preferred experience in SOC architecture OR Performance analysis. Strong background in Computer architecture, Hardware performance metrics and bottlenecks. Experienced in modelling and simulation of hardware. Experience in performance profiling, creating experiments to address various use-cases and doing design space exploration. Good to have experience of creation of designs for ACAP devices or HLS. Good communication skills ACADEMIC CREDENTIALS: bachelors or Masters degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent

In this role you will work on SoC/Sub-system level Prototype development and design bring up on HAPS/Pro FPGA HW platforms. Additionally, you will work closely with design, verification, validation, SW teams to implement emulation testbench and features required to develop content on prototyping models. You would be required to develop/port tests to qualify models. Key Skills 8-15 years of experience on SOC/Sub system Prototyping of multi-million Gate and complex Design with multiple clocks and power domains Experience in microcontroller architecture, Cores ARM A/M series, Interconnect(NIC, FlexNoC), Protocols like AHB,AXI, Memory(Flash, SRAM,DDR4/5) and memory controllers Experience in automotive protocols like LIN, CAN, High speed protocols like PCIe, Ethernet, USB etc would be an advantage Prototyping model development with actual target HW Experienced in HAPS/Pro FPGA Prototyping platforms Create and execute Test plans targeting model qualification Experience with Speed Bridge Integration and perform real time testing would be plus Scripting and Automation to continuously improve operational efficiency

The Opportunity Were looking for the Wavemakers of tomorrow. About the job The Opportunity Were looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrows future by accelerating the critical data communication at the heart of our digital world - from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. What Youll Do Will be responsible for verification of IP, Block, or Subsystem at Soc Level Generate appropriate documentation for verification Responsible for analyzing/debugging given blocks/tasks in verification Should be able to develop and own the verification environment, verification components developed You will report to Lead Engineer What Youll Need: 6+ years of experience with a Bachelors/ masters degree in the field of Electrical, Electronics, or computer engineering Should have a good understanding of verification flow, challenges, and requirements of functional verification Have worked on IP level or Block level or SoC level functional verification Experience with digital verification aspects such as constrained random verification, functional coverage, code coverage, assertions, methodology & philosophy Expert in System Verilog, Verilog, and OVM/UVM verification methodology Have working experience on AMBA interface protocols (AXI, AHB, APB) Knowledge of Verilog/System Verilog, digital simulation, and debugging is a must Hands-on experience on working one or more of the following protocols is a must - UART, I2C, SPI, QSPI, I3C, eMMC, CAN, Hands-on experience working with one or more of the following protocols is desired - PCIe, USB, DDR, LPDDR, GBE, SATA Experience with Perl, Python or similar scripting languages will be helpful Ability to adapt & learn, quickly and willingness to proactively take on responsibilities beyond the job description to accomplish team goals. We have a flexible work environment to support and help employees thrive in personal and professional capacities" As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Competitive Compensation Package Restricted Stock Units (RSUs) Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch & Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process.

The role will be a key player in organization responsible for Characterizing and validating Analog and Digital IP based Silicon Solutions at Cadence. Candidate should possess strong leadership skills with ability to manage multiple priorities and guide team members on day-to-day lab tests and silicon characterization activities. Ownership of tasks, ability to collaborate with remote teams located worldwide and clear communication skills, are must have attributes in this role. Coordination with R&D, Marketing teams in defining the scope and delivering the results in time are critical. Minimum Qualifications & Professional Experience: 10-15 years (with BTech) or 10 years (with MTech) experience in Post-Silicon PHY, Systems Interop and Compliance testing. 2-3 years of management experience leading/mentoring a small team of engineers Physical Layer and Protocol layer experience on AT LEAST ONE High speed SERDES on Ethernet/PCIe/CXL/UCIe/ Debug skills and Experience in using lab equipment such as Oscilloscopes, Bit Error Rate Testers, Protocol Exercisers, Analyzers. Proficient with Ethernet, PCIe, UCIe standards and Protocols. Proven experience to interpret the standard s specification to develop Electrical and Protocol, Interoperability and Compliance test suites to validate the silicon. Ability to isolate the PHY and controller (MAC/PCS) features to test, develop calibration / compliance lab suites and characterize. Architect and design Printed circuit boards in Schematic and layout level. Familiarity with peripheral chips, high speed interface design techniques, Signal and Power integrity checks / analysis and fixes needed to meet the performance requirements. Experience in PCIe/UCIe LTSSM states / UCIe Interfaces / Ethernet standards is a plus. Proven experience in developing lab automation scripts and test result analysis to debug and root cause silicon failures. Expertise in developing ESD/Latchup/ HTOL tests to meet industry standards reliability qualification & specification Expert level knowledge in Verilog RTL coding for FPGA, python,C/C++

Job Description SoC Verification Engineer The SoC Development team at Sandisk is seeking highly motivated SoC Verification Engineers to join our talented team, working on cutting-edge controller development for high-performance SoCs used in industry-leading products. Role & Responsibilities: As a SoC Verification Engineer , you will play a key role in ensuring the quality and reliability of our SoC designs. You will be responsible for: Developing verification test plans based on design specifications. Creating and executing test cases across multiple platforms , including RTL simulation, FPGA prototyping, and Palladium emulation . Performing Gate-Level Simulations (GLS) and debugging complex SoC designs. Collaborating with design, architecture, and firmware teams to define verification strategies and drive coverage-driven verification methodologies . Contributing to the development of advanced verification environments , including UVM, PSS testbenches. Analyzing functional coverage and simulation results to enhance verification efficiency and effectiveness. Why Join Us? At Sandisk , you ll be part of a team of highly skilled engineers solving complex verification challenges and driving innovations in data storage solutions . Your work will directly impact the performance and reliability of high-volume new age data solutions, consumer and enterprise products. Together, we ll push the boundaries of technology, unlock the full potential of data, and shape the future of storage solutions. Qualifications Required : BE or MS degree in Electrical/Electronics Engineering or Computer Engineering, with 4-8 years of experience Deep understanding of C, SystemVerilog UVM and coverage driven verification methodology History of building and improving UVM based verification methodology Knowledge on Chiplet Protocols - UCIe Skills : Develop and execute verification plans Proficiency with C, Verilog, System Verilog and UVM based verification Experience in implementing advanced test benches, verification models, scoreboards/checkers. Knowledge in bus protocols - AXI, AHB, APB and bus interconnects Experience with test plan creation and test-bench development Experience with test development and test coverage assessment Excellent debugging and problem-solving skill Knowledge in various interfaces - PCIe, DP, UART, I2C, I2S, SPI, USB, SD Experience working on processor-based SoC -- ARC/ARM/RISC.. Create and modify SoC-level, and sub-system level test benches. Experience in setting up and running gate-level simulations Gate Level / Power-Aware simulations Great written and verbal communication skills Good Programming/Scripting skills with languages such as Python, Perl, TCL, and BASH Interest in ASICs, SoCs, flash memory, semiconductor components Strong team player who can collaborate with colleagues

FPGA/RTL DESIGN ENGINEER (4 to 12 Years) FPGA Design Company: ACL Digital (Wafer space Semiconductor) Location [Bangalore/Pune/Chennai] Experience: 4 to 12 Years Openings: 4 Positions Job Description Responsibilities Design, implement, and validate FPGA architectures and digital circuits, ensuring high performance and reliability. Utilize VHDL/Verilog to develop and simulate complex digital systems, optimizing for speed and resource utilization. Collaborate with cross-functional teams to define requirements, specify design parameters, and conduct design reviews. Conduct thorough testing and debugging of FPGA designs, employing tools such as ModelSim, Vivado, and SignalTap. Document design processes and methodologies, maintaining detailed records for compliance and future reference. Stay abreast of industry trends and emerging technologies to continuously enhance design practices and methodologies. Required and Preferred Qualifications Required: Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field. 4+ years of experience in FPGA design, with a proven track record of successful project delivery. Strong proficiency in VHDL/Verilog and experience with FPGA development tools such as Xilinx Vivado or Intel Quartus. Solid understanding of digital design principles, including timing analysis, signal integrity, and data path optimization. Preferred: Master's degree in a relevant field. Experience with high-speed design and mixed-signal circuits. Familiarity with hardware description languages for system-level design. Knowledge of embedded systems and experience with microcontroller/Microprocessor interfaces. Technical Skills and Relevant Technologies Expertise in FPGA architecture and design tools (Xilinx, Intel, Lattice). Experience with simulation and verification tools (ModelSim, Questa, etc.). Strong knowledge of digital signal processing (DSP) concepts and applications. Soft Skills and Cultural Fit Exceptional problem-solving abilities with a keen attention to detail. Strong collaboration and communication skills, with the ability to work effectively in a team environment. Proactive approach to identifying opportunities for improvement and innovation. Passionate about technology, with a continuous learning mindset.

Job TitleSenior Engineer(Timing & Synchronization) LocationBengaluru Work EmploymentFull time DepartmentWireless DomainSoftware Reporting toManager About Us Tejas Networks is a global broadband, optical and wireless networking company, with a focus on technology, innovation and R&D. We design and manufacture high-performance wireline and wireless networking products for telecommunications service providers, internet service providers, utilities, defence and government entities in over 75 countries. Tejas has an extensive portfolio of leading-edge telecom products for building end-to-end telecom networks based on the latest technologies and global standards with IPR ownership. We are a part of the Tata Group, with Panatone Finvest Ltd. (a subsidiary of Tata Sons Pvt. Ltd.) being the majority shareholder. Tejas has a rich portfolio of patents and has shipped more than 900,000 systems across the globe with an uptime of 99.999%. Our product portfolio encompasses wireless technologies (4G/5G based on 3GPP and O-RAN standards), fiber broadband (GPON/XGS-PON), carrier-grade optical transmission (DWDM/OTN), packet switching and routing (Ethernet, PTN, IP/MPLS) and Direct-to-Mobile and Satellite-IoT communication platforms. Our unified network management suite simplifies network deployments and service implementation across all our products with advanced capabilities for predictive fault detection and resolution. As an R&D-driven company, we recognize that human intelligence is a core asset that drives the organization’s long-term success. Over 60% of our employees are in R&D, we are reshaping telecom networks, one innovation at a time. Why join Tejas: We are on a journey to connect the world with some of the most innovative products and solutions in the wireless and wireline optical networking domains. Would you like to be part of this journey and do something truly meaningful? Challenge yourself by working in Tejas’ fast-paced, autonomous learning environment and see your output and contributions become a part of live products worldwide. At Tejas, you will have the unique opportunity to work with cutting-edge technologies, alongside some of the industry’s brightest minds. From 5G to DWDM/ OTN, Switching and Routing, we work on technologies and solutions that create a connected society. Our solutions power over 500 networks across 75+ countries worldwide, and we’re constantly pushing boundaries to achieve more. If you thrive on taking ownership, have a passion for learning and enjoy challenging the status quo, we want to hear from you! About the Team Our Team Modern eNodeB (4G LTE Radio) or gNodeB (5G NR Radio) are key elements of mobile Telecom network. These radios are realized in different ways Standalone Radio , BBU (Base Band Unit) and RRH (Remote Radio Head), O-RAN CU (Central Unit) DU (Distributed Unit) and RU (Radio Unit). In deployments RU/RRH are deployed on top of the tower and BBU/CU-DU at bottom. The RU/RRH key functionality is to convert base band signals to RF and also amplify signal to higher power. Tejas Networks has invested in Wireless product development since 2012 with a vision to create globally deployable telecom RAN solutions. Several of the key components developed by the Wireless R&D team have been installed and commissioned across three continents. We are an active partner for 5G in the Indian Ecosystem and have significantly contributed to India’s standardization efforts in 3GPP, through TSDSI. The wireless team has over 100 patents. As part of the wireless team, you will work on developing products for next generation wireless systems. What you work: Responsible for Design, Development and Implementation of Timing & Synchronization Chipset Control and Configuration software Applications related to 5G Radio Unit Must have ability to think outside the box, creating innovate solution to complex embedded applications and wireless systems. Candidate will be working in variety of wireless products that are telecom grade developed, manufactured, and supplied to international customers by Tejas Networks Ltd should have working experience with international customer & have handled development of software’s for networking / telecom equipment’s. Responsible forbuilding Application / Control Software Timing & Synchronization Lead team of 2-3 Members, build & nurture people involved in 5G O-RU platform Timing and Synchronization software development activities. Platform Architecture definition and bring in innovation in modularity. Interact & Coordinate with internal teams to build better product Mandatory skills: Must have mandatory experience in developing application, drivers , wrapper code for one of the T&S Chipsets from SiTime, SiLabs, ADI, TI Must have knowledge on PTP, SyncE and associated ITU Standards. Must have experience in building application including the use of interfaces such as AXI, UART, SPI, I2C, JESD, GPIO etc. on FPGA/SoC. Must have understanding on Message queues, Shared memory, Process, Threads, Scheduler Must have hands on experience in handling Oscilloscopes, Logic/ protocol Analyzers, Multimeters etc. Understanding of debuggers including JTAG, GDB etc. Understanding of GitHub, Jira etc. Understanding of baseband control system, state machines and configuration management. Good in documentation of High-level design and Low-level design. Desired Skills: Secure coding and software quality management. Knowledge on Mobile Wireless Systems. Knowledge on Network protocols and socket programming. Experience in Wireless Radio, Wireless protocols desirable Preferred Qualifications: Experience: 3-6 years’ experience in Timing and Syne with Radio- ORAN Education: B.E / BCA / M.S / M.Tech in Electronics Communication OR Instrumentation engineering discipline or equivalent Diversity and Inclusion Statement : Tejas Networks is an equal opportunity employer. We celebrate diversity and are committed to creating all inclusive environment for all employees. We welcome applicants of all backgrounds regardless of race color, religion, gender, sexual orientation, age or veteran status. Our goal is to build a workforce that reflects the diverse communities we serve and to ensure every employee feels valued and respected.

Job TitleStaff Engineer (Layer 1) LocationBengaluru Work EmploymentFull time DepartmentWireless DomainSoftware Reporting toGroup Manager About Us: Tejas Networks is a global broadband, optical and wireless networking company, with a focus on technology, innovation and R&D. We design and manufacture high-performance wireline and wireless networking products for telecommunications service providers, internet service providers, utilities, defence and government entities in over 75 countries. Tejas has an extensive portfolio of leading-edge telecom products for building end-to-end telecom networks based on the latest technologies and global standards with IPR ownership. We are a part of the Tata Group, with Panatone Finvest Ltd. (a subsidiary of Tata Sons Pvt. Ltd.) being the majority shareholder. Tejas has a rich portfolio of patents and has shipped more than 900,000 systems across the globe with an uptime of 99.999%. Our product portfolio encompasses wireless technologies (4G/5G based on 3GPP and O-RAN standards), fiber broadband (GPON/XGS-PON), carrier-grade optical transmission (DWDM/OTN), packet switching and routing (Ethernet, PTN, IP/MPLS) and Direct-to-Mobile and Satellite-IoT communication platforms. Our unified network management suite simplifies network deployments and service implementation across all our products with advanced capabilities for predictive fault detection and resolution. As an R&D-driven company, we recognize that human intelligence is a core asset that drives the organization’s long-term success. Over 60% of our employees are in R&D, we are reshaping telecom networks, one innovation at a time. Why join Tejas: We are on a journey to connect the world with some of the most innovative products and solutions in the wireless and wireline optical networking domains. Would you like to be part of this journey and do something truly meaningful? Challenge yourself by working in Tejas’ fast-paced, autonomous learning environment and see your output and contributions become a part of live products worldwide. At Tejas, you will have the unique opportunity to work with cutting-edge technologies, alongside some of the industry’s brightest minds. From 5G to DWDM/ OTN, Switching and Routing, we work on technologies and solutions that create a connected society. Our solutions power over 500 networks across 75+ countries worldwide, and we’re constantly pushing boundaries to achieve more. If you thrive on taking ownership, have a passion for learning and enjoy challenging the status quo, we want to hear from you! Who we are Tejas wireless team has developed high-capacity LTE macro eNodeB, 5G NR gNodeB along with Radio Units as part of end-to-end integrated solution to their customers. Our systems are already deployed in customer’s commercial network and engineers are working on to enhance the capacity and improve system level performance. Tejas Networks has invested in Wireless product development since 2012 with a vision to create globally deployable telecom RAN solutions. Several of the key components developed by the Wireless R&D team have been installed and commissioned across three continents. We are an active partner for 5G in the Indian Ecosystem and have significantly contributed to India’s standardization efforts in 3GPP, through TSDSI. The wireless team has over 100 patents. As part of the wireless team, you will work on developing products for next generation wireless systems. What you work: As a Staff Engineer, you will be responsible for driving development and sustenance various Network Functions and/or platform for our Wireless Team. You’ll lead technical initiatives, mentor team members and collaborate closely with cross functional teams to drive innovation and ensure high-quality deliverables. You’ll leverage your expertise to solve challenging problems and contribute to strategic engineering decisions. You will be contributing in product development and delivery including planning, requirement analysis, design, implementation, validation, verification and field testing Analyze and prioritize various features for different sub-systems to get a synchronized system delivery in a phased manner Closely work with other teams and partners to carry out system integration and user acceptance testing Focus to continuously improve system performance with quality deliverables. Mandatory skills: Candidate should possess hands on experience on Layer-1, algorithm design, implementation and optimization on DSP, ASSP Processors, FPGA platforms Should be specialized in system engineering aspects, design and evaluate complex algorithm in MATLAB/C Environment. Should have in depth knowledge of 3GPP layer 1 specifications & Algorithms for 4G /NB-IoT/5G, ORAN Split definitions, Conformance Test Criterions Candidate should have deep understanding in using various lab equipment such as – signal generators, signal and spectrum analyzer, channel emulators. Good understanding of wireless communication fundamentals and its application in design. Desired skills: Familiar with any of these technologies OFDM, MIMO, Bea, MmformingMSE, Turbo/LDPC codes, Physical channels, CPRI/eCPRI interface. Should have work experience in eNodeB/gNodeB/UE L1 SW development. Familiar with any RAN Platform architecture, L1 Schedulers Good debugging skills, log analysis and solving Field issues. Preferred Qualifications Experience: 10 to 15 years’ experience from Telecommunication or Networking background. Education Tech/BE (CSE/ECE/EEE/IS) or any other equivalent degree Candidate should have good coding skills in C/C++ Diversity and Inclusion Statement : Tejas Networks is an equal opportunity employer. We celebrate diversity and are committed to creating all inclusive environment for all employees. We welcome applicants of all backgrounds regardless of race color, religion, gender, sexual orientation, age or veteran status. Our goal is to build a workforce that reflects the diverse communities we serve and to ensure every employee feels valued and respected.

Looking for Siemens EDA ambassadors Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the Increasingly complex world of chip, board, and system design. Real trendsetters in every language. Before our software developers write even a single line of code, they have to understand what drives our customers. What is the environment and the user story based on? Implementation means trying, testing, and improving outcomes until a final solution emerges. Knowledge means exchange discussions with colleagues from all over the world. Join the team and enjoy the freedom to think in completely new categories. Be an integral part of a team that is developing comprehensive verification IPs for interfaces such as PCIe Gen5/Gen6, USB3.2, 400Gigabit Ethernet, DDR5, LPDDR5 and leading coherency protocols like CXL for use with Questa RTL simulation! We make real what matters. This is your role. Questa verification IP"™s help design teams find more bugs in less time than conventional simulation techniques. You will specify, implement, test and enhance these verification components for a wide range of end user applications. You will work on technologies involving SV, UVM, Assertions, Coverage, Test plan, BFM design, debug, and logger. You will work well with TMEs and Field AEs or directly with customers to deploy or resolve customer issues. We don"™t need superheroes, just super minds. We are seeking Electronics Engineers (B.Tech/M.Tech) or professionals from related fields, graduated from reputed institutes, who possess strong expertise in verification engineering and bring 2-4 years of hands-on experience to the table. You've sound knowledge of System Verilog for test bench with exposure to verification methodologies like UVM, VMM etc. You've intimate knowledge of one or more standard bus protocols, like PCIe, USB, SATA, NVMe, Flash, DIMM etc. We are phenomenal teammates, resilient and sincere, with a passion for learning new things and building our knowledge base in new areas! We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we welcome applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit, and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, bonus scheme, generous holiday allowance, pension, and private healthcare. Transform the everyday #LI-EDA #LI-Hybrid #DVT

We Are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us craft tomorrow! Looking for Siemens EDA AmbassadorsSenior Member Of Technical Staff Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. We Are Not Looking for Superheroes, Just Super Minds We"™ve got quite a lot to offer. How about you? Qualifications: You"™re a Graduate / Postgraduate (Bachelors/Masters) in EEE) / ECE/Computer Science (CS) from top reputed Engineering colleges with significant experience in software development. Experience in EDA will be a great plus. Your sound understanding of C/C++ languages, design patterns along with data structure and algorithms will be key to development of software. Your good knowledge of Graph will enhance the development time. Must have ability to understand complex products, solutions, and problems Self-motivated, self-discipline, with high integrity Team person who is easy to talk to This role is in Noida, where you"™ll get the chance to work with teams impacting entire cities, countries and the craft of things to come. This is dynamic environment where the learning curve is very high. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on any race, religion, colour, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform crucial job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation. At Siemens, we are always challenging ourselves to build a better future. We need the most innovative and diverse Digital Minds to develop tomorrow"™s reality. Find out more about the Digital world of Siemens herewww.siemens.com/careers/digitalminds. Join our Talent Community today and let's stay connected in areas that interest you. #LI-EDA #LI-Hybrid

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. About the role: We are seeking a highly motivated and detail-oriented Application Support Engineer to join our dynamic, fast paced and growth-mindset team. In this role, you will be focused on supporting the Questa verification products, specifically in Verification IP line of products. In this position, you will be working closely with the product engineering team, field application engineers and customers. As an ASE, you will be solving some of our customers complex design, testbench and environment issues in the domain of functional verification. You will also be working closely on creating knowledge-based content and providing expertise on the Questa platform. You will work with multiple customers to understand their challenges and flow and be involved in technical presentations, training, evaluation and competitive benchmarking. You will part of the larger application support engineering organization and will be interfacing regularly with the North American and PACRIM teams. Minimum Qualifications: BS Electronic/Computer Engineering from an accredited institution Minimum of 2+ years of Digital Design/Verification experience Knowledge of VHDL or Verilog, or SystemVerilog RTL languages for ASIC or FPGA design Experience with ASIC or FPGA hardware design and implementation using RTL tool flows and methodologies Knowledge of Windows and Linux OS Self-motivated, flexible, self-disciplined, and comfortable in a dynamic, quick-moving environment. Strong interpersonal and communications skills with the ability to quickly establish rapport and credibility with our customers, sales, and product teams. Strong oral, and written communication, and presentation skills Excellent organizational and time management skills Preferred qualifications MS Electronic/Computer Engineering Knowledge of UVM and System Verilog for Verification Clock Domain Crossing (CDC), Static and Formal Verification Formal Applications Working knowledge of Working knowledge of Questa-Modelsim, VCS (Synopsys), NCSim (Cadence) or Aldec simulators. Knowledge of C/C++ programming languages Demonstrated proficiency with Object-Oriented Programming experience in test bench architecture and design Knowledge of scripting languages (e.g., Shell, Tcl, Perl, Python) Knowledge of CDC, low power and formal methodologies. Location Noida/ Bangalore Why us? Working at Siemens Software means flexibility - Choosing between working at home and the office at other times is the norm here. We offer great benefits and rewards, as you'd expect from a world leader in industrial software. A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we welcome applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit, and business need. Bring your curiosity and creativity and help us shape tomorrow! Siemens Software. Transform the Everyday #Li-EDA #LI-HYBRID

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. This role is based in Bengaluru. But you"™ll also get to visit other locations in India and globe, so you"™ll need to go where this job takes you. In return, you"™ll get the chance to work with teams impacting entire cities, countries, and the shape of things to come. We make real what matters! This is your role Deploy Siemens EDA ProFPGA prototyping software and hardware solutions at customers and guide the customers to successful design bring-up Work closely with R&D to solve problems, review product specs, and find good general solutions that improve the overall product Train AE"™s and customers on the solutionWin pre-sales engagements in cooperation with the technical sales teams Successfully deploy our solutions at early customer sites. This means educating the customer on best practices and tool requirements. It also means working with R&D to make the tool improvements necessary for the customer"™s success. Ensure existing customers maximize the value they receive from the solution by developing and enhancing methodology that exploits the solution"™s capabilities Ensure customers are kept up-to-date with the latest enhancements Provide customer requirements to R&D and marketing Work with QA and Docs to help them create tests and documentation that will improve our solutions Create examples and tutorials that are shipped with our products. Develop and/or refine methodology employed in creating and using prototypes and maximizing the value of our prototyping solution We don"™t need superheroes, just super minds! A good understanding of FPGA based hardware prototyping platforms Working knowledge of multi FPGA prototyping flows(Synthesis, partitioning, PnR, runtime and debug) Practical insights into the application and usage of FPGA prototyping systems Knowledge of design mapping, testbench mapping and transactor development Expertise of hardware/software debug solutions related to FPGA prototyping Knowledge of test bench acceleration, ICE and co-model solutions Highly proficient in HDLs (Verilog/SV) for RTL design and HVLs (SV/UVM) for verification Solid background in Functional Verification, RTL synthesis and PnR flows Conversant with SoC design and architecture concepts Good communication and inter-personal skills. #disw #LI-EDA #LI-Hybrid We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. At Siemens, we are always challenging ourselves to build a better future. We need the most innovative and diverse Digital Minds to develop tomorrow"™s reality. Find out more about the Digital world of Siemens here: www.siemens.com/careers/digitalminds We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Siemens Software. Where today meets tomorrow

locationsIndia, Bangaloreposted onPosted Today job requisition idJR0275251 Job Details: About The Role : Intel is at the forefront of the wireless communication industry, offering cutting-edge products that set the standard for performance and innovation. We are seeking a highly skilled SerDes PHY System Engineer to join our team. In this pivotal role, you will be responsible for the design and development of physical layer components for high-speed SerDes systems, ensuring their performance and reliability. Key Responsibilities: SerDes PHY DesignLead the design and development of the physical layer for SerDes systems, including transmitter and receiver architectures, equalization techniques, and signal integrity. Simulation and ValidationConduct comprehensive simulations using MATLAB and Python, along with lab testing, to validate the performance and compliance of the SerDes PHY, optimizing it for high-speed data transmission. Calibration TechniquesDevelop and implement calibration methods to enhance the performance of the SerDes PHY, ensuring high-quality data transmission. CollaborationWork closely with cross-functional teams, including digital design, hardware, and software, to ensure seamless integration of the PHY layer into the overall SerDes system. DocumentationMaintain detailed and up-to-date documentation of design specifications, test plans, and results. Problem-SolvingAddress and resolve complex technical issues related to the SerDes PHY, ensuring optimal performance. Quality AssuranceImplement quality control measures and best practices to ensure the reliability and robustness of the SerDes PHY. Qualifications: Bachelor's degree in Electrical Engineering; a Master's degree in a relevant field is preferred. Minimum of 5 years of experience in wired or wireless communication systems. Proven experience and enthusiasm for lab work, collaboration, and solution development. Prior experience in DDR/PCI/GDDR7/UCI will be added advantage. Proficiency in scripting and programming languages such as C, C#, MATLAB, and Python. Experience in silicon development and SerDes technologies is advantageous. Strong problem-solving abilities and analytical skills. Self-motivated and capable of executing tasks in uncertain environments. Demonstrated leadership skills and ability to drive initiatives in a matrix organization. Job Type: Experienced Hire Shift: Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group: The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. *

Objective We are looking for an experienced System Hardware Design Engineer from Product/Semiconductor industry background. Roles and Responsibilities As a Senior/Lead Hardware Engineer you will be designing innovative and high performance next generation Protocol Analyser products for the semiconductor industry. We are looking for candidates who thrive in a fast paced start-up like environment, you will be engaged In all aspects of hardware design life cycle including high-speed board design, R&D, proof of concept designs and validation. Basic Qualifications Bachelor's or masters degree in Electrical/Electronics/Communication Engineering or related field from reputed institute. 4 to 8 years of board design experience from any product based organization Proficient in high-density/high-speed design (including FPGA's, SerDes, PCIe Gen4/Gen5,UFS 4.0, 10/100 GigE, CPHY/DPHY,USB 3.2) Experience in interfacing high-speed memories such as DDR4/5, RDIMM, SODIMM Modules system integration including schematic and layout using industry-standard capture and design packages such as spice, Altium or Cadence. Hardware validation, troubleshooting, board bring-up, candidate should be good at using high-end laboratory equipment An outstanding teammate with strong interpersonal and communication skills. Collaborate with RTL, SW and quality engineers to integrate and debug the system level issues. Good verbal and written communication skills, design documentation as per organizational standards. Preferred Qualifications Experience in signal integrity and power integrity, High speed board design concepts. Hands-on Signal integrity analysis, PI and high speed analog simulation, SI tools such as HFSS, SIwave, ADS and Hyperlynx. Hands on with 33GHz and 50GHz Oscilloscopes and GHz pattern generators for protocol capture, timing and eye diagram analysis. Inclusion and Diversity We are committed to fostering a workplace that celebrates diversity in all its forms and believe diverse teams drive innovation, creativity, and success. We aim to create an inclusive environment where all employees feel valued and respected.

Through our dedicated associates, Conduent delivers mission-critical services and solutions on behalf of Fortune 100 companies and over 500 governments - creating exceptional outcomes for our clients and the millions of people who count on them. You have an opportunity to personally thrive, make a difference and be part of a culture where individuality is noticed and valued every day. Job Track Description Performs business support or technical work, using data organizing and coordination skills. Performs tasks based on established procedures. In some areas, requires vocational training, certifications, licensures, or equivalent experience. General Profile Expands skills within an analytical or operational process. Maintains appropriate licenses, training, and certifications. Applies experience and skills to complete assigned work. Works within established procedures and practices. Establishes the appropriate approach for new assignments. Works with a limited degree of supervision. Functional Knowledge Has developed skillset in a range of processes, procedures, and systems. Business Expertise Helps teams to integrate and work together to support the achievement of company goals. Impact Impacts a team, by example, through the quality service and information provided. Uses discretion to modify work practices and processes to achieve results or improve efficiency. Leadership May provide informal guidance to junior team members. Problem Solving Ability to problem solve, self-guided. Evaluates issues and solutions to provide the best outcome for clients and end-users. Interpersonal Skills Clearly and effectively exchanges information and ideas. Responsibility Statements Creates a quality checklist to determine potential defects. Reviews transactions and selects samples for auditing. Performs risk assessments related to performance monitoring and financial operations. Understands the connectivity of up-stream and down-stream processes with respect to the process they are auditing. Validates audit findings with operations personnel to concur with root cause analysis (RCA). Performs other duties as assigned. Complies with all policies and standards. Conduent is an Equal Opportunity Employer and considers applicants for all positions without regard to race, color, creed, religion, ancestry, national origin, age, gender identity, gender expression, sex/gender, marital status, sexual orientation, physical or mental disability, medical condition, use of a guide dog or service animal, military/veteran status, citizenship status, basis of genetic information, or any other group protected by law. People with disabilities who need a reasonable accommodation to apply for or compete for employment with Conduent may request such accommodation(s) by submitting their request through this form that must be downloaded:click here to access or download the form. Complete the form and then email it as an attachment toFTADAAA@conduent.com.You may alsoclick here to access Conduent's ADAAA Accommodation Policy. At Conduent we value the health and safety of our associates, their families and our community. For US applicants while we DO NOT require vaccination for most of our jobs, we DO require that you provide us with your vaccination status, where legally permissible. Providing this information is a requirement of your employment at Conduent.

Through our dedicated associates, Conduent delivers mission-critical services and solutions on behalf of Fortune 100 companies and over 500 governments - creating exceptional outcomes for our clients and the millions of people who count on them. You have an opportunity to personally thrive, make a difference and be part of a culture where individuality is noticed and valued every day. Job Track Description: Performs business support or technical work, using data organizing and coordination skills. Performs tasks based on established procedures. In some areas, requires vocational training, certifications, licensures, or equivalent experience. General Profile Expands skills within an analytical or operational process. Maintains appropriate licenses, training, and certifications. Applies experience and skills to complete assigned work. Works within established procedures and practices. Works with a moderate degree of supervision. Functional Knowledge Has developed skillset in a range of processes, procedures, and systems. Business Expertise Supports the achievement of company goals by integrating teams for the best outcome. Impact Impacts a team through quality of services and information provided. Follows standardized procedures and practices and receives moderate supervision and guidance. Leadership Has no supervisory responsibilities. Manages own workload. Problem Solving Ability to problem solve, self-guided. Evaluates issues and solutions to provide the best outcome for the client and end-users. Interpersonal Skills Exchanges information and ideas effectively. Responsibility Statements Reviews current processes and identifies trends. Reviews work produced for errors. Evaluates for performance standards (SLAs) required under contract. Compares various sampling techniques and identifies correct samples for auditing. Evaluates workflow tools to run reports. Coaches Level 1 auditors on sampling techniques and business process knowledge. Reconciles transaction processing for data accuracy. Interacts with external auditors to include (SOC 1) Service and Organizational Control Report. Performs other duties as assigned. Complies with all policies and standards. Conduent is an Equal Opportunity Employer and considers applicants for all positions without regard to race, color, creed, religion, ancestry, national origin, age, gender identity, gender expression, sex/gender, marital status, sexual orientation, physical or mental disability, medical condition, use of a guide dog or service animal, military/veteran status, citizenship status, basis of genetic information, or any other group protected by law. People with disabilities who need a reasonable accommodation to apply for or compete for employment with Conduent may request such accommodation(s) by submitting their request through this form that must be downloaded:click here to access or download the form. Complete the form and then email it as an attachment toFTADAAA@conduent.com.You may alsoclick here to access Conduent's ADAAA Accommodation Policy. At Conduent we value the health and safety of our associates, their families and our community. For US applicants while we DO NOT require vaccination for most of our jobs, we DO require that you provide us with your vaccination status, where legally permissible. Providing this information is a requirement of your employment at Conduent.

locationsHYDERABAD, IND time typeFull time posted onPosted 3 Days Ago job requisition idR1148332 . TBA Offers of employment are conditional upon passage of screening criteria applicable to the job.

Essential Duties and Responsibilities: Responsible for defining, implementing, executing, and documenting embedded software for Baxter s peritoneal dialysis device portfolio. The activities will encompass all facets and phases of software development & test and life cycle management, meeting all regulatory and quality standards to realize complex, innovative, reliable systems that improve the quality of life for people around the world. Collaborate with other engineering and functional organizations to understand and define product use cases and convert these use cases into software requirements and design implementations. Own and lead all activities of software sub-system development and life-cycle management including sub-system development plans, SW requirements development, code development and optimization, unit and integration testing, SW risk and reliability analysis, root cause analysis. Transform software requirements into software architectures and verify that all software projects adhere to architecture standards. Lead concept selection efforts and design alternatives. Devise simulator solutions for the product portfolio. Drive research on emerging software architecture techniques and standards. Champion technical and industry trends related to software design and development Ensure all interface requirements are documented. Provide leadership to teams of engineers in multiple sites. Define the test automation strategy and implementation. Coordinate the software test activities with all other engineering disciplines, including external development partners. Qualifications Graduate or Post Graduate in Computer Science or related Engineering and 10 - 15 years of experience, including technical leadership. Prior experience in Renal device domain is a plus. A demonstrated track record in embedded software development, preferably medical devices or other highly regulated products such as military hardware. A proven track record of effectiveness in a fast paced environment. Experience in algorithms, code optimization, encryption, multiple language support C, C++, Assembly ARM processor development. Ability to work in a Linux development environment ARM / AVR processor development FPGA programming skills Intel embedded X86 development a plus Experience in embedded RTOS development Experience with USB, Ethernet, RS232 communications protocols Experience with sensor sampling Ability to develop boot loader code for microcontrollers Working level knowledge with standards such as IEC 62304, IEC 62366, IEC 60601, ISO 13485 and ISO14971 would be a plus.

Required Experience: Masters degree in Electronic and Electrical Engineering At least 5 years of relevant industry experience Strong background in both Digital and Analog Circuit Design, as well as Digital Communication Systems Proven experience in hardware design for consumer electronics products Proficient in using modern schematic capture tools, PCB layout software, and design simulation tools Solid understanding of computer hardware architecture and networking concepts Experience in developing and executing test scripts, including test automation practices Familiarity with chipsets used in TV, broadcast, and streaming applications Experience with Design for Cost (DfC) and Design for Manufacturing (DfM) principles Skilled in using standard analog and digital measurement instruments Hands-on experience with FPGA and microcontroller programming, including debugging Demonstrated expertise in system bring-up, debugging, validation, testing, and performance optimization Working knowledge of EMC compliance and RF testing procedures

Are you looking for a unique opportunity to be a part of something greatWant to join a 20,000-member team that works on the technology that powers the world around usLooking for an atmosphere of trust, empowerment, respect, diversity, and communicationHow about an opportunity to own a piece of a multi-billion dollar (with a B!) global organizationWe offer all that and more at Microchip Technology, Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values ; we affectionately refer to it as the Aggregate System and it s won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await! Job Description: You will be working with our Design team from Hyderabad to develop STA tests. These tests are intended to catch timing violations at block level /SoC. In this role you will have an opportunity to understand in depth FPGA/SoC silicon architectures at block level as well as full chip level, to develop constraints and, debug the setup, perform static timing analysis and debug Timing violations. Interact with Physical design Teams and propose fixes for the timing violations. You will work closely with design engineers, custom engineers and layout engineers to ensure FPGA division deploys new products with the highest quality and shortest time to market. Skills will be developed to work on multiple projects supporting key functions within the organization. Good communication and presentation skills are required. Requirements/Qualifications: Perform Static Timing Analysis ASIC blocks and full chip with industry lead EDA tools like prime-time / Tempus, understand different interfaces, ASIC blocks and work on constraints and develop different STA modes at full chip level. Track post layout netlist releases spef extractions and integrate the new releases into full chip STA environment. Perform verification processes with modelling and simulation using industry standard simulators Maintain technical expertise and provide training to juniors Contribute to cross group communication to work towards standardization and group success Proactively solicit input from Standards, CAD, modelling and layout to ensure the design quality Drive innovation into the future generation with dynamic work environment Previous strong experience in STA and making timing constrains Experience in taking an industrial specification and implementing the respective IP Good understanding on timing/area/power/complexity trade-offs on complex interface design Familiar with IP level verification and strong RTL debugging capabilities Experience in frontend implementation tasks such as synthesis and logic equivalence Experience in large scale mix signal circuitry design including logic implementation/verification, timing analysis/optimization an advantage Excellent problem-solving and analytical skills A self-motivated, enthusiastic team player who enjoys working with others Good communication skills with the ability to convey complex technical concepts to other design peers in verbal and written form. Travel Time: 0% - 25% To all recruitment agencies : Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

In This Role, Your Responsibilities Will Be: Build and maintain strong technical relationships with key accounts, encouraging confidence in NIs platform. Understand customer technical requirements and recommend the appropriate software & hardware solutions. Collaborate with account teams, taking the lead on technical strategies for the accounts. Stay ahead of industry trends, identifying and addressing future customer technical needs. Act as the voice of the customer, influencing NI s technical direction and product development. Who You Are: Passionate about solving complex technical problems and have a customer-centric approach. You excel in a fast-paced setting and accept new opportunities. Strong ability to communicate complex technical concepts to a non-technical audience. Self-motivated, a quick learner, and have a strong desire to grow in a customer-facing engineering role. For This Role, You Will Need: An undergraduate or graduate degree in a STEM field (science, technology, engineering, or math). A minimum of 8+ years of work experience in the test and measurement industry. At least 5 years of proven experience in the aerospace and defense industries, especially in a customer-facing role. Experience collaborating closely with sales teams and communicating technical information to customers. Solid knowledge of automated test software and hardware platforms. Excellent verbal, written, and interpersonal communication skills, with proficiency in English. Willingness and ability to travel within India (~50%) and occasionally to APAC and the US (~5%). Preferred Qualifications That Set You Apart: A background in electronics and communication or mechatronics or automotive engineering. Hands-on experience with RF fundamentals and measurements. Proficiency in software tools such as NI LabVIEW, . NET, Python, C++, and software design patterns. Certifications in NI LabVIEW and NI TestStand development patterns. Experience in FPGA programming and fixed-point algorithm development. Our Culture & Commitment to You: At Emerson, we prioritize a workplace where every employee is valued, respected, and empowered to grow. We foster an environment that encourages innovation, collaboration, and diverse perspectives because we know that great ideas come from great teams. Our commitment to ongoing career development and growing an inclusive culture ensures you have the support to thrive. Whether through mentorship, training, or leadership opportunities, we invest in your success so you can make a lasting impact. We believe diverse teams, working together are key to driving growth and delivering business results. We recognize the importance of employee wellbeing. We prioritize providing competitive benefits plans, a variety of medical insurance plans, Employee Assistance Program, employee resource groups, recognition, and much more. Our culture offers flexible time off plans, including paid parental leave (maternal and paternal), vacation and holiday leave.