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Principal Engineer - HBM_SOC Physical Verification Micron

10.0 - 15.0 years

0 Lacs

karnataka

On-site

As an ASIC Physical Verification Engineer at Micron Technology, you will play a crucial role in achieving the best Power, Performance, and Area (PPA) by ensuring the closure of Block/Chip Tile PV. Your responsibilities will involve DRC & LVS closure for both Block and Full Chip designs in complex hierarchical structures at 5nm/3nm nodes. You will have the opportunity to collaborate with various teams such as IR, IP, ESD, and PD to ensure Physical Verification Convergence and resolve conflicts effectively. Additionally, you will be expected to handle multiple blocks simultaneously with minimal supervision, ensuring Full Chip LVS & DRC closure and Analog integration closure for all IPs used in...

Posted 4 days ago

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