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0.0 - 4.0 years
0 Lacs
roorkee, uttarakhand
On-site
The ideal candidate should have a keen interest in compiler, architecture, formal methods, security, or C++ programming.,
Posted 6 days ago
4.0 - 8.0 years
0 Lacs
noida, uttar pradesh
On-site
As an experienced professional with over 4 years of experience, you will be responsible for developing RTL code for complex digital circuits using Hardware Description Languages (HDLs) like Verilog or VHDL. Your role will involve performing functional verification through simulation and formal methods. Additionally, you will participate in code reviews to ensure compliance with coding standards. In this position, you will analyze timing performance and conduct static timing analysis (STA) to optimize circuit performance. Collaboration with design, verification, and synthesis teams will be essential to ensure successful tape-out of designs. It is crucial to stay informed about the latest RTL design methodologies and tools to enhance your work efficiency and effectiveness. The ideal candidate should have a strong background in RTL coding, functional verification, and timing analysis. Effective communication and collaboration skills are key to working efficiently with cross-functional teams. A proactive approach to learning and adapting to new technologies in the field of digital circuit design is highly valued.,
Posted 1 week ago
3.0 - 7.0 years
0 Lacs
maharashtra
On-site
As a Data Scientist Associate Senior at JPMorgan Chase within the Asset & Wealth Management, you will be an integral part of a dynamic team where your unique skills will contribute to a successful culture and team. Your role involves collaborating with an agile team to create and implement reliable data collection, storage, access, and analytics solutions in a secure, stable, and scalable manner. Your responsibilities include the development, testing, and maintenance of crucial data pipelines and architectures across multiple technical areas within different business functions to support the firm's objectives effectively. In this position, you will design and implement solutions that leverage AI capabilities to address data management challenges. You will also provide guidance on and prioritize research areas that uphold data management and governance standards. Collaboration with lines of business and corporate functions is essential to identify co-development solutions focused on overcoming data management obstacles. The ideal candidate should have formal training or certification in data science concepts along with a minimum of 3 years of practical experience. Demonstrated expertise in deploying and overseeing machine learning models in production environments is necessary. You should possess a strong ability to monitor ML models in production, effectively tackling performance and data quality issues. Proficiency in implementing security best practices and compliance standards for Machine Learning systems is crucial. Experience with infrastructure optimization techniques to improve performance and efficiency is required. Additionally, developing REST APIs using frameworks like Flask or FastAPI for seamless integration into business solutions is expected. Preferred qualifications include experience with formal methods and formal verification, knowledge graphs, graph theory, and data management. These additional skills would be advantageous in fulfilling the responsibilities of the role effectively.,
Posted 2 weeks ago
3.0 - 20.0 years
0 Lacs
hyderabad, telangana
On-site
Build your career with Sykatiya Technologies. Sykatiya Technologies values technical ability and attitude within its highly talented team, which is reflected in the contributions made to customer projects. The team consists of skilled engineers and experts specializing in Design Verification, DFT/Test, Physical Design, and Analog Design for ASICs. This position is for IP/SOC/ASIC Verification with a required experience level of 3-20 years. The location for this role is in Bangalore & Hyderabad. As a member of the ASIC verification team, you will be responsible for the functional verification of ASIC IPs. The verification methodology utilizes advanced techniques and tools such as coverage-driven constrained random verification and formal verification. Object-oriented architectures and frameworks play a crucial role in the design and implementation of verification environments. The ideal candidate will possess expertise and aptitude in verifying functions like image processing, video compression, and computer vision. Additionally, as a verification engineer, you will have the opportunity to delve into the algorithms supporting the hardware. We are seeking an experienced engineer with exceptional programming skills and a genuine interest in ASIC verification. The verification environments at Sykatiya Technologies are complex, requiring individuals who can comprehend, implement, and maintain intricate software systems effectively. Preferred qualifications for this role include prior experience in hardware verification using SystemVerilog, UVM, low power verification, and formal methods. The ideal candidate is expected to be analytical, systematic, and detail-oriented in their approach. Join our team at Sykatiya Technologies and be a part of a dynamic environment where your skills and expertise in ASIC verification will be valued and nurtured.,
Posted 1 month ago
3.0 - 7.0 years
0 Lacs
maharashtra
On-site
As a Data Scientist Associate Senior at JPMorgan Chase within the Asset & Wealth Management, you will be an integral part of a dynamic team. Your distinctive skills will contribute to a winning culture and team. In this role, you will serve as a seasoned member of an agile team, working to design and deliver trusted data collection, storage, access, and analytics solutions in a secure, stable, and scalable manner. Your primary responsibility will be to develop, test, and maintain critical data pipelines and architectures across multiple technical areas within various business functions to support the firm's business objectives. Your key job responsibilities will include designing and developing solutions that leverage AI capabilities for data management challenges. You will also be responsible for advising and leading the prioritization of research areas that support data management and governance. Furthermore, you will update and collaborate with our lines of business and corporate functions to identify co-development solutions focused on data management challenges. To be successful in this role, you must have formal training or certification in data science concepts and at least 3 years of applied experience. You should also have proven experience in deploying and managing machine learning models in production environments. A strong ability to monitor ML models in production, address model performance, and data quality issues effectively is essential. Additionally, you should have a working knowledge of security best practices and compliance standards for Machine Learning systems. Experience with infrastructure optimization techniques to enhance performance and efficiency will be beneficial. Proficiency in developing REST APIs using frameworks such as Flask or FastAPI for seamless integration into business solutions is also required. Preferred qualifications, capabilities, and skills for this role include experience with formal methods and formal verification. Knowledge of knowledge graphs and graph theory is a plus. Experience with data management will also be advantageous.,
Posted 1 month ago
2.0 - 8.0 years
0 Lacs
karnataka
On-site
Are you interested in working with a world-class CPU design team at Qualcomm India Private Limited Do you have a passion for applying formal methods to verify application processors and contributing to the development of next-generation formal methodologies Qualcomm's CPU team is at the forefront of developing processors that will power the future. Join us on this exciting adventure and maximize your formal verification skills on complex designs. As a member of the CPU design team, you will collaborate closely with the design team to grasp design intent and establish verification plans with a focus on end-to-end formalization from architecture to micro-architecture refinement. Your responsibilities will include defining formal verification architecture, creating test plans, and constructing formal sign-off environments for Qualcomm CPU components. You will deploy model-checking technology across hardware designs, encompassing property verification, mathematical proofs, architectural modeling, and validation in cutting-edge application areas. To excel in this role, you should hold a BA/BS degree in CS/EE with over 8 years of practical experience in applying formal methods in hardware or software. A solid background in model checking or theorem proving for complex systems is essential. Proficiency in writing assertions, developing modeling code in Hardware Description Languages, or ensuring correctness of architectural specifications using formal methods is required. Familiarity with model checkers like Jaspergold and VC-Formal, or theorem-proving tools such as ACL2 and HOL, is advantageous. The ideal candidate would possess an MS/PhD degree in CS/EE with at least 4 years of practical experience and a strong foundation in formal methods applied to hardware specifications or implementations. Domain knowledge in areas such as microprocessor architecture, instruction set architecture, floating-point math, memory consistency, memory coherency, and security architectures is beneficial. Additionally, strong software engineering skills, automation abilities, and proficiency in programming languages like C++, Python, or TCL are preferred. Minimum Qualifications: - Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field with 4+ years of Hardware Engineering experience OR - Master's degree in Computer Science, Electrical/Electronics Engineering, or related field with 3+ years of Hardware Engineering experience OR - PhD in Computer Science, Electrical/Electronics Engineering, or related field with 2+ years of Hardware Engineering experience Qualcomm is an equal opportunity employer that provides accommodations for individuals with disabilities during the application and hiring process. If you require assistance, please contact disability-accommodations@qualcomm.com. Qualcomm expects employees to adhere to all applicable policies and procedures, including security and confidentiality requirements. For further information about this role, please reach out to Qualcomm Careers.,
Posted 1 month ago
2.0 - 6.0 years
2 - 6 Lacs
Bengaluru / Bangalore, Karnataka, India
On-site
What You'll Be Doing: Leading and mentoring a team of formal verification engineers to ensure high-quality IP delivery. Developing and driving formal verification plans, aligning with project timelines and IP deliverables. Defining test plans tailored to high-complexity digital IPs such as UFS MIPI Unipro I3C, AMBA, and other interconnect protocols. Identifying and implementing state-of-the-art formal verification methodologies and tools, including assertions, SystemVerilog Assertions (SVA), and custom verification environments. Driving innovation to enhance verification efficiency and coverage. Evaluating and mitigating verification risks early in the design phase to ensure IPs meet high-quality standards. The Impact You Will Have: Ensuring the robustness and quality of our digital design hardware IPs. Delivering best-in-class, verified IPs to semiconductor design companies globally. Enhancing verification efficiency and coverage through innovative methodologies. Mitigating verification risks early in the design phase, ensuring timely and high-quality IP releases. Contributing to the development of high-performance silicon chips and software content. Driving continuous technological innovation in chip design and verification. What You'll Need: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. Advanced degrees preferred. 2 6 years of experience in formal verification of digital design IPs, with a strong track record in verifying complex IPs. Deep understanding of formal verification methodologies, including property-based and equivalence checking, SystemVerilog Assertions (SVA), and protocol compliance. Strong familiarity with industry-standard formal verification tools, such as Cadence JasperGold, Synopsys VC Formal, or Mentor Questa Formal. Extensive experience in digital design and verification for high-speed interconnect protocols. Who You Are: An excellent problem solver with a proactive approach to identifying and addressing verification challenges. A collaborative team player who thrives in a dynamic environment. An effective communicator who can lead and mentor junior engineers. An innovative thinker who drives continuous improvement in verification methodologies. A detail-oriented professional committed to delivering high-quality IPs.
Posted 2 months ago
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