7.0 - 12.0 years

0 Lacs

hyderabad, telangana

On-site

Role Overview: You should have experience working on Video domain IPs and Digital IPs. Additionally, you should have expertise in one or more protocols at the IP level such as MIPI CSI, MIPI DSI, DisplayPort, HDMI, or SDI. Key Responsibilities: - Hands-on experience with architecting and micro-architecture - Verilog/System Verilog RTL coding for FPGA designs - Experience with lint, CDC, synthesis flow, static timing flows, and formal checking Qualification Required: - Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Computer Science Engineering, or equivalent Experience: You should have 7-12 years of relevant experience in FPGA design.,

Posted 1 week ago

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Principal Engineer - ASIC Digital Design IP Development (Ethernet/UALink Protocols) Synopsys Inc

12.0 - 14.0 years

0 Lacs

bengaluru, karnataka, india

On-site

Alternate Job Titles: Principal Engineer - ASIC Digital Design IP Development (Ethernet/UALink Protocols) We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly experienced and passionate ASIC Digital Design expert with a strong track record in architecting, implementing, and delivering cutting-edge RTL designs for hi...

Posted 3 weeks ago

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SoC RTL Design / SOC Integration - Memory Team Samsung Electronics

10.0 - 15.0 years

0 Lacs

karnataka

On-site

Role Overview: You will be responsible for securing an optimal digital IP and circuit by understanding required functions to be developed and designing and verifying them in line with the required goals. Your role will involve contributing in either SoC Clock/reset, SoC Power IP/Subsystem, BUS/Subsystem, Peripheral/CPU, Host Subsystem, or Flash Subsystem based on your prior skills and desire to learn. Key Responsibilities: - Have 10 to 15 years of work experience in VLSI SoC RTL design. - Understand digital design principles, specifically AMBA SoC BUS protocols such as APB, AXI, and AHB. - Create micro-architecture and detailed design documents for SoC design considering performance, power, ...

Posted 3 weeks ago

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RTL Design Engineer AMD

5.0 - 7.0 years

0 Lacs

hyderabad, telangana, india

On-site

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiencesfrom AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challengesstriving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Toge...

Posted 2 months ago

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SoC RTL Design / SOC Integration - Memory Team Samsung Electronics

10.0 - 15.0 years

0 Lacs

karnataka

On-site

As an experienced VLSI SoC RTL designer with 10 to 15 years of work experience, you will play a crucial role in securing an optimal digital IP and circuit. Your responsibilities will include designing and verifying functions in alignment with the required goals. You will have the opportunity to contribute to various areas such as SoC Clock/reset, SoC Power IP/Subsystem, BUS/Subsystem, Peripheral/CPU, Host Subsystem, and Flash Subsystem based on your skills and interests. To excel in this role, you should have a strong understanding of digital design principles, with specific knowledge of AMBA SoC BUS protocols like APB, AXI, and AHB. Your tasks will involve creating micro-architecture and de...

Posted 4 months ago

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