Memory Layout requirement FiveForce Technologies

3.0 - 7.0 years

0 Lacs

hyderabad, telangana

On-site

The role involves layout design of memory circuit/digital design on the latest technology nodes. As an Engineer, you are expected to have a good attitude, seek new challenges, possess good analytical and communication skills. You should have the ability and desire to learn quickly and excel as a team player. Your key responsibilities will include implementing the layout of digital circuits, conducting DRC, LVS, and other physical verification checks, designing floor-plans, routing, addressing crosstalk fixes, electro-migration fixes, and IR fixes. You will also be handling different tools such as Calibre and Virtuoso. Preferred experience for this role includes a strong background with tools for schematics and layout, proficiency in scripting languages to automate layout flow, excellent communication skills, ability to multitask across projects, collaborate with geographically spread-out teams, experience in FinFET & Dual Patterning nodes like 16/7/5/3nm, a good understanding of CMOS basics and digital circuits, strong analytical and problem-solving skills with attention to detail. To qualify for this position, you should hold a Bachelor's degree in Electronics/Electrical Engineering and possess skills in electro-migration fixes, design rule checking (DRC), physical verification checks, layout design, scripting languages, LVS, Calibre, crosstalk fixes, routing, IR fixes, Virtuoso, skill scripts, floor-plan design, and digital design.,

Posted 1 week ago

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