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0.0 - 4.0 years
0 Lacs
noida, uttar pradesh
On-site
You are invited to attend a walk-in interview on 21st June 2025, at YMCA International Centre, Glamour Banquet, Sarkhej Gandhinagar Highway, Ahmedabad, Gujarat 380015. The walk-in timings are from 10:00 AM to 5:00 PM IST for the position of Annotation Analyst (Back Office/Non Voice) in Gandhinagar, Gujarat. As an Annotation Analyst, you will be a crucial part of our team, contributing to the training of machine learning models by accurately labeling and annotating various types of data including images, text, audio, or video. Your role will involve collaborating with machine learning engineers and data scientists to meet annotation requirements and maintain data quality. Key Responsibilities...
Posted 1 week ago
0.0 - 4.0 years
0 Lacs
tamil nadu
On-site
We are seeking the right candidates to join our team. As a part of our company, you will be responsible for various tasks including Photoshop editing and video rendering for projects related to our company. Additionally, you will be required to maintain the cleanliness and hygiene of our office premises. Opening the office every day and ensuring proper lighting are also part of the responsibilities. Knowledge of civil engineering tasks such as AutoCAD, floor planning, and other construction office-related duties will be advantageous for this role. The job types available include full-time, permanent, fresher, and internship positions with a contract length of 36 months. In terms of benefits,...
Posted 1 week ago
4.0 - 9.0 years
18 - 32 Lacs
Pune, Mumbai (All Areas)
Work from Office
Urgent Hiring VLSI Physical Design / STA / EMIR Engineers (Immediate Joiners Only) | Pune Location Location: Pune Notice Period: Only Immediate Joiners Hiring Duration: Till 3rd Week of June Mode: Full-time Opportunity 1. Physical Design Engineer Experience: 4 to 6 Years Key Responsibilities: Full RTL-to-GDSII flow execution including floorplanning, power planning, placement, CTS, routing, DRC/LVS closure. Work on advanced technology nodes (7nm/5nm and below). Experience in hierarchical and flat implementation. Ownership of block-level PnR, timing closure, IR/EM, and physical verification. Interfacing with cross-functional teams RTL, DFT, PD, and verification teams. Required Skills: Strong e...
Posted 3 months ago
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