2.0 - 6.0 years

0 Lacs

ahmedabad, gujarat

On-site

Role Overview: As a Verification Engineer, you will utilize your 2+ years of experience in ASIC/FPGA verification to develop test plans and verification strategies that thoroughly validate requirements and specifications. Your expertise in developing SV + UVM based verification environment components and creating tests using constrained random based test sequences will be essential for success in this role. Key Responsibilities: - Develop test plans and verification strategies - Develop SV + UVM based verification environment components - Implement functional coverage and resolve coverage gaps - Write tests to ensure comprehensive verification - Contribute to code coverage activities - Enhan...

Posted 4 days ago

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