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RTL ASIC Design Engineer/Lead/Manager Tessolve

8.0 - 12.0 years

0 Lacs

karnataka

On-site

As an RTL Engineer and Lead at Tessolve Semiconductors in Bangalore or Hyderabad, your role will involve RTL ASIC front end design with microarchitecture and Verilog coding. Your key responsibilities will include: - MAS development - RTL coding - Development of module and feature addition - Experience in medium complexity protocols - Familiarity with slow speed protocols like I2C, SPI, and UART - Knowledge of AMBA bus protocols (APB, AHB, AXI) - Experience in quality check flows such as linting and CDC For candidates with 8+ years of experience, the expectations will be higher, including: - Very strong RTL coding skills - Micro-architecture (uArch) development - Ownership and delivery of a s...

Posted 2 days ago

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