0.0 years

0 Lacs

delhi, india

On-site

Education BE/ BTech (Electronics/ Electrical/ Electronics and Communication) MS or MTech would be preferred The Candidate Is Expected To Have Worked On Scan insertion and DRC cleanup Pattern generation for Stuck-At, delay test, iddq, path delay and fault grading. Memory testing. Should also know the algorithms. Should also have knowledge about diagnostics. JTAG or P1500 or other interface mechanism Desirable competencies The Candidate Is Expected To Have Exposure To Compression tools is highly desirable LBIST, mixed-signal testing, logic equivalence Writing testbenches and should be capable of writing RTL code for DFT blocks as and when required. Bridge fault detection is desirable ATE exper...

Posted 2 months ago

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Design Verification Engineer - VC Z01X (Fault Injection/Functional Safety) Interex semiconductor

0.0 years

0 Lacs

bengaluru, karnataka, india

On-site

Role Description We are seeking a Design Verification Engineer with strong expertise in VC Z01X fault injection and simulation solutions . The ideal candidate will have a proven background in functional safety verification, fault simulation and ISO 26262/IEC 61508 compliance. Qualifications Hands-on experience with VC Z01X fault injection and simulation. Strong knowledge of functional safety standards (ISO 26262, IEC 61508). Experience in simulation environments using VC Z01X tool . Background in semiconductor design , ASIC/SoC verification , or functional safety verification . Familiarity with fault campaigns, fault grading, and safety mechanisms . Interested candidates can share their resu...

Posted 2 months ago

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