Physical Design Engineer Silcosys Solutions

3.0 - 8.0 years

5 - 12 Lacs

Noida, Hyderabad, Bengaluru

Work from Office

As a Physical Design Engineer, you will be responsible for implementing and optimizing physical designs for high-performance VLSI systems. You will work on a wide range of tasks, including synthesis, placement, routing, and timing closure, ensuring that our designs meet stringent power, performance, and area (PPA) requirements. Responsibilities: 1. Perform RTL-to-GDSII implementation, including synthesis, floorplanning, placement, clock tree synthesis (CTS), routing, and sign-off. 2. Optimize designs for PPA while adhering to design constraints and manufacturing requirements. 3. Conduct static timing analysis (STA), power analysis, and physical verification (DRC/LVS). Collaborate with RTL de...

Posted 4 months ago

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US/ HR Helpdesk Professionals Deloitte

0.0 - 5.0 years

1 - 6 Lacs

Hyderabad

Work from Office

Role & responsibilities Respond to customer HR inquiries through multiple channels - Phone, chat and web tickets.(calls, webforms, emails, chats and voicemails). Develop an understanding of US Human Capital Management (HCM) nuances, including payroll, benefits, talent, policies etc. Gain hands-on experience with applications like Workday, Oracle, SAP, and UKG. Developing a higher level of accuracy and speed in task completion, demonstrating the ability to efficiently process transactions, showing proficiency in client service Communicate (verbal and written) with customers from different countries and cultures. Utilize the client knowledge base to find answers and solutions independently Own...

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Physical Verification Engineer : Bangalore Incise Infotech

3.0 - 6.0 years

20 - 35 Lacs

Bengaluru

Work from Office

Experience with physical verification checks DRC, LVS, Antenna, ERC, PERC, ESD etc. Experience in PnR tools like ICC/Innovus with regards to physical convergence must. Good understanding of PD flows and overall backend tool flow would be beneficial. Understanding sign-off PDV tools like PDK Concepts, SVRF, Calibre and DRV. TCL/PERL Scripting is plus. Hands on experience :Innovus/Fusion Compiler , Tech lef is preferable. Interested candidates can share their resumes to shubhanshi@incise.in

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Analog Layout Engineer -Lead IBM

7.0 - 14.0 years

7 - 14 Lacs

Bengaluru / Bangalore, Karnataka, India

On-site

Analog layout design requires knowledge of designing layouts of complex VLSI (very large scale integration) circuits using graphic editing tools in the Analog domain. A major portion of the job is in the creation of new physical design data from concepts, partial schematics, or a working knowledge of overall requirements. Responsibilities include checking the design integrity with respect to semiconductor ground rules and the logical function of the circuit. Symbolic circuit data (schematics) are converted to physical shapes which represent the semiconductor process. The role ranges from manual shapes and checking tool manipulations to extended team coordination and methodology creation. The...

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Physical Design / Physical Verification Engineer Truechip Solutions

3.0 - 8.0 years

8 - 18 Lacs

noida, hyderabad, bengaluru

Work from Office

Key Skills: Netlist to GDSII flow, CTS, timing closure DRC, LVS, PERC, ERC, Soft Checks Tools: Innovus, ICC, PrimeTime, Calibre, Redhawk Worked on 28nm & below nodes Strong debugging and custom routing skills.

Posted Date not available

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