Are you ready to take the next step in your career and contribute to cutting-edge ASIC and IP/SoC development? We are looking for an experienced Design Engineer to join our team in Hyderabad. This is an exciting opportunity to work with a talented team on high-impact projects, pushing the boundaries of digital design in a collaborative and fast-paced environment. As a key technical contributor, you will work closely with ASIC engineering management to define and implement digital IP/SoC designs, and integrate these with third-party designs into customer ASICs and SoCs. You’ll be part of a multi-site development team, ensuring the delivery of high-quality designs that meet customer requirements and solving complex technical challenges. Key Responsibilities: Design & Implementation: Specify, micro-architect, implement, and perform design verification for complex RTL IP blocks, from basic SoC building blocks to advanced video processing and encoding/decoding logic. IP Development Cycle: Take part in the full lifecycle of IP development—from customer concept to backend layout and silicon validation. Collaboration: Work closely with SoC architects to ensure designs align with project requirements and integrate seamlessly with the rest of the SoC. Technical Guidance: Provide technical advice and solutions to design, verification, physical design, silicon validation, and production test teams. Customer & Team Engagement: Analyse customer requirements and implement functional digital designs and integration flows for complex SoCs. Provide support for customer-facing technical discussions. Tool & Script Development: Develop, maintain, and deploy proprietary scripts and tools for ASIC/SoC design and database management. Leverage industry-leading EDA tools for design quality assurance, power optimisation, and synthesis/timing analysis. Continuous Learning: Stay up-to-date with the latest advances in engineering technologies and methodologies to maintain our competitive edge. Mentorship: Coach junior engineers and support them in all aspects of design activities, including coding, synthesis, debug, DFT, and backend integration. Technical Publications: Contribute to technical white papers, and provide sales support as part of a collaborative team. Key Relationships: Internal: Collaborate with Engineers, Senior Engineers, Principal Engineers, Project Managers, Sales, Finance, and HR teams. External: Technical communication with customers (minimal), and liaising with EDA Tool Vendors, Foundries, and Assembly Houses. What We're Looking For: Qualifications: Essential: Degree/Masters or PhD in Electrical Engineering, Computer Science, or a related field. Typically, 5+ years of relevant experience in digital design and IP/SoC development. Desirable: A Masters or PhD in a related subject with practical experience of 5+ years. Skills & Experience: Essential: Expertise in IP design, implementation, and verification. Strong knowledge of RTL synthesis, performance, and power analysis. In-depth understanding of digital design concepts and problem-solving capabilities. Proficient in HDL coding (VHDL, Verilog, SystemVerilog). System design knowledge, including clock domain management, reset schemes, and power management. Experience with SoC level verification (HW/SW co-verification, multi-mode simulation, gate-level simulation). Experience with design checking tools (Lint, CDC, LEC). Strong communication skills and ability to provide technical guidance to junior engineers. Desirable: Familiarity with ARM processor subsystems, video processing, bus protocols (AXI/AHB/ACE). Experience with low power design methodology (UPF/CPF) and synthesis/timing analysis. Experience with Tcl, Perl, Python, SystemC, IPXACT, and database management. Familiarity with Linux software frameworks. Attributes: Self-motivated with the ability to work independently and as part of a team. Strong problem-solving skills and ability to adapt quickly to changing priorities. Excellent attention to detail and time management skills. A fast learner who thrives in a dynamic, collaborative environment. Show more Show less
