6.0 - 10.0 years

0 Lacs

karnataka

On-site

As an experienced and highly motivated Lead Memory Design Engineer at our company, your role will involve driving the architecture, design, and development of advanced memory IPs such as SRAMs, ROMs, CAMs, and Register Files. You will be leading a team of designers, interacting with cross-functional groups, and delivering high-performance, low-power, and silicon-proven memory solutions at advanced technology nodes. Key Responsibilities: - Define architecture and design specifications for custom memory IPs or memory compilers. - Design and optimize circuits such as: Memory cell arrays, sense amplifiers, precharge, write drivers, decoders, control logic. - Lead the schematic-level design and s...

Posted 1 month ago

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Lead Memory Design Engineer ACL Digital

8.0 - 12.0 years

0 Lacs

karnataka

On-site

Role Overview: As a Lead Memory Design Engineer, you will be responsible for driving the architecture, design, and development of advanced memory IPs including SRAMs, ROMs, CAMs, and Register Files. Your role will involve leading a team of designers, collaborating with cross-functional groups, and delivering high-performance, low-power, and silicon-proven memory solutions at advanced technology nodes. Key Responsibilities: - Define architecture and design specifications for custom memory IPs. - Optimize circuits such as memory cell arrays, sense amplifiers, and decoders. - Lead schematic-level design and simulation. - Collaborate with layout and verification teams. - Guide post-layout activi...

Posted 3 months ago

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Lead Memory Design Engineer ACL Digital

6.0 - 10.0 years

0 Lacs

karnataka

On-site

As a Lead Memory Design Engineer, you will be responsible for driving the architecture, design, and development of advanced memory IPs including SRAMs, ROMs, CAMs, and Register Files. Your role will involve leading a team of designers, collaborating with cross-functional groups, and delivering high-performance, low-power, and silicon-proven memory solutions at advanced technology nodes. Your key responsibilities will include defining architecture and design specifications for custom memory IPs, optimizing circuits such as memory cell arrays, sense amplifiers, and decoders, leading schematic-level design and simulation, collaborating with layout and verification teams, guiding post-layout act...

Posted 5 months ago

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