9 Em Analysis Jobs

Job Description You are a Principal Engineer, Physical Design responsible for leading the implementation and optimization of low-power, chiplet-based MCU designs on cost-optimized mature process nodes. Your primary focus is to deliver high-quality and affordable microcontrollers by utilizing proven technologies and efficient design methodologies. Role Overview: - Own end-to-end physical design for chiplet-based MCU SoCs, which includes floorplanning, placement, power planning, signal integrity, routing, timing closure, and physical verification. - Apply best practices for mature-node design to achieve cost efficiency without compromising performance. - Collaborate with architecture and packa...

Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world's leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwid...

Job Description Role Summary We are seeking a strategic and technically hands-on leader to drive end-to-end Physical Design execution across multiple design centers in APAC. The ideal candidate will combine deep technical mastery in implementation flows with proven experience managing distributed teams toward predictable execution, industry-leading PPA (Performance, Power, Area), and first-silicon success. Key Responsibilities Leadership & Strategy Define and execute a long-term physical design strategy aligned with business and product goals. Build, mentor, and scale a world-class PD organization across APAC sites (Hyderabad, Singapore, etc.). Champion flow automation, design methodology in...

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world's most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage The opportunity ...

Job Description : Senior Staff Engineer - Power Integrity / IR drop analysis Job Description The PI Signoff / IR Drop Analysis Lead is responsible for Signoff level IR drop, Power/Signal EM analysis of a Subsystem and Full SoC. He is responsible for running EM and Static/Dynamic IR analysis for various modes/power scenarios, root cause failures, provide fixing solutions. He should follow/define best practices and strategy as per technology node. He contributes to problem solving related to overall PI analysis. Responsibilities include EM and IR drop analysis (vector and vectorless) for both block and full chip designs for various power modes and scenarios. Provide feedback / improvement / fi...

Responsibilities: Work as part of the Design Enablement team, closely collaborating with SoC cross-functional teams Define and develop PDN and PV flows and methodologies for low geometry nodes (3nm, 5nm, 16nm) Manage requirements and define tools and flows needed for SoC-level implementation Collaborate with EDA vendors to evaluate and benchmark latest PDN & PV tools and methodologies Lead deployment and adoption of new tools, flows, and methodologies across the organization Act as a change agent in introducing innovative flow improvements and process standardization

Description The team that built the innovative Silicon IP AZ1 Neural Edge that is powering the latest generation of Echo devices is looking for a Sr. Physical Design Engineer to continue to innovate on behalf of our customers. We are a part of Amazon Lab126 that revolutionized reading with our Kindle family of products and reimagined user experience through Echo and Alexa. We want you to help us build on the success of our first generation of ML accelerator at edge. Work hard. Have fun. Make history. Roles & Responsibilities: - Collaborate with architecture, timing, and logic design teams making a crucial impact on delivering cutting edge & Low power SOCs. - Perform I/O, bump & RDL (redistri...

Company Description SILCOSYS Solutions collaborates with clients to develop next-generation flagship products, including mobile devices, routers, consumer goods, storage solutions, microprocessors, and graphics processors. We are known for pioneering cutting-edge technologies that are both pivotal and rare in the industry. With expertise in crafting intricate SoCs, SILCOSYS Solutions also boasts one of the industry&aposs most robust analog/mixed signal and software design teams. Position: Senior Memory Layout Engineer Experience: 6 - 15 Years Location: Bangalore Notice Period: 0 - 15 Days Role Description Looking for experts in memory compilers with solid hands-on experience in SRAM, ROM, TC...

We are seeking a highly skilled and experienced PDN (IR Drop & EM analysis) & PV (Physical Verification) expert to join our Flows & Methodologies Team . This role requires strong analytical skills, attention to detail, and collaboration with cross-functional teams. Proficiency in EDA tools and a solid understanding of digital design principles are essential for success. Location: Noida (Hybrid work mode) Experience: 5 to 15 years Key Responsibilities & Skills: Work closely with SoC cross-functional teams to develop and define PDN & PV flow and methodologies for low geometry nodes (3nm, 5nm, 16nm). Hands-on experience in PDN (IR Drop & EM Analysis) and PV (Physical Verification) domains. Expe...