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8.0 - 10.0 years
0 Lacs
bengaluru, karnataka, india
On-site
Job Description : Senior Staff Engineer - Power Integrity / IR drop analysis Job Description The PI Signoff / IR Drop Analysis Lead is responsible for Signoff level IR drop, Power/Signal EM analysis of a Subsystem and Full SoC. He is responsible for running EM and Static/Dynamic IR analysis for various modes/power scenarios, root cause failures, provide fixing solutions. He should follow/define best practices and strategy as per technology node. He contributes to problem solving related to overall PI analysis. Responsibilities include EM and IR drop analysis (vector and vectorless) for both block and full chip designs for various power modes and scenarios. Provide feedback / improvement / fi...
Posted 2 weeks ago
10.0 - 15.0 years
4 - 6 Lacs
noida, uttar pradesh, india
On-site
Responsibilities: Work as part of the Design Enablement team, closely collaborating with SoC cross-functional teams Define and develop PDN and PV flows and methodologies for low geometry nodes (3nm, 5nm, 16nm) Manage requirements and define tools and flows needed for SoC-level implementation Collaborate with EDA vendors to evaluate and benchmark latest PDN & PV tools and methodologies Lead deployment and adoption of new tools, flows, and methodologies across the organization Act as a change agent in introducing innovative flow improvements and process standardization
Posted 1 month ago
10.0 - 12.0 years
0 Lacs
india
On-site
Description The team that built the innovative Silicon IP AZ1 Neural Edge that is powering the latest generation of Echo devices is looking for a Sr. Physical Design Engineer to continue to innovate on behalf of our customers. We are a part of Amazon Lab126 that revolutionized reading with our Kindle family of products and reimagined user experience through Echo and Alexa. We want you to help us build on the success of our first generation of ML accelerator at edge. Work hard. Have fun. Make history. Roles & Responsibilities: - Collaborate with architecture, timing, and logic design teams making a crucial impact on delivering cutting edge & Low power SOCs. - Perform I/O, bump & RDL (redistri...
Posted 1 month ago
6.0 - 15.0 years
0 Lacs
Bengaluru, Karnataka, India
On-site
Company Description SILCOSYS Solutions collaborates with clients to develop next-generation flagship products, including mobile devices, routers, consumer goods, storage solutions, microprocessors, and graphics processors. We are known for pioneering cutting-edge technologies that are both pivotal and rare in the industry. With expertise in crafting intricate SoCs, SILCOSYS Solutions also boasts one of the industry&aposs most robust analog/mixed signal and software design teams. Position: Senior Memory Layout Engineer Experience: 6 - 15 Years Location: Bangalore Notice Period: 0 - 15 Days Role Description Looking for experts in memory compilers with solid hands-on experience in SRAM, ROM, TC...
Posted 3 months ago
5.0 - 10.0 years
12 - 19 Lacs
noida
Hybrid
We are seeking a highly skilled and experienced PDN (IR Drop & EM analysis) & PV (Physical Verification) expert to join our Flows & Methodologies Team . This role requires strong analytical skills, attention to detail, and collaboration with cross-functional teams. Proficiency in EDA tools and a solid understanding of digital design principles are essential for success. Location: Noida (Hybrid work mode) Experience: 5 to 15 years Key Responsibilities & Skills: Work closely with SoC cross-functional teams to develop and define PDN & PV flow and methodologies for low geometry nodes (3nm, 5nm, 16nm). Hands-on experience in PDN (IR Drop & EM Analysis) and PV (Physical Verification) domains. Expe...
Posted Date not available
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