84 Electromigration Jobs - Page 3

Greetings from Eximietas Design! We are actively looking to hire Senior Analog Layout Leads/Architects with 7-15 years of experience in lower FINFET technology nodes, preferably TSMC 5nm, to join our growing team in Hyderabad. We prefer candidates with a notice period of 30 days or less. As a Senior Analog Layout Lead/Architect, you will be responsible for contributing to cutting-edge analog layout design. You should have expertise in IR drop, Electromigration, self-heating, RC delay, and parasitic capacitance optimization. A solid understanding of how layout impacts circuit performance, such as speed and area, is essential. You should be able to implement layouts that meet tight design cons...

Hi...! Greetings from Eximietas Design...! We are actively looking to hire Senior Analog Layout Leads/Architects with (TSMC 5nm / TSMC 7nm preferred) 7–15 years of experience to join our growing team. 📍 Locations: Visakhapatnam (Vizag). 📅 Notice Period: 30 days or less preferred. Job Description: We’re seeking highly skilled professionals with a strong background in lower FINFET technology nodes (TSMC 5nm/7nm preferred) to contribute to cutting-edge analog layout design. Key Skills & Requirements: Expertise in IR drop, Electromigration, self-heating, RC delay, and parasitic capacitance optimization. Solid understanding of how layout impacts circuit performance (speed, area, etc.). Ability to...

Hi...! Greetings from Eximietas Design...! We are actively looking to hire Senior Analog Layout Design Engineers / Leads with (TSMC 5nm / TSMC 7nm preferred) 7–15 years of experience to join our growing team. 📍 Locations: Visakhapatnam (Vizag) 📅 Notice Period: 30 days or less preferred. Job Description: We’re seeking highly skilled professionals with a strong background in lower FINFET technology nodes (TSMC 5nm/7nm preferred) to contribute to cutting-edge analog layout design. Key Skills & Requirements: Expertise in IR drop, Electromigration, self-heating, RC delay, and parasitic capacitance optimization. Solid understanding of how layout impacts circuit performance (speed, area, etc.). Abi...

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a dedicated and innovative engineer with a solid background in Standard Cell Circuit design, particularly focusing on high-performance flip flops, latches, multibit flip flops, voltage level shifters, power optimization cells, clock cells, and other complex circuits. Your ...

Greetings from Eximietas Design! We are actively seeking Senior Analog Layout Design Engineers / Leads with a minimum of 5-12 years of experience in the field, preferably with expertise in TSMC 5nm or TSMC 7nm technology nodes. Join our dynamic team at locations in Bengaluru, Vizag, or Hyderabad. As a Senior Analog Layout Design Engineer, you will be responsible for contributing to cutting-edge analog layout design, focusing on aspects such as IR drop, Electromigration, self-heating, RC delay, and parasitic capacitance optimization. Your role will involve implementing layouts that adhere to strict design constraints while ensuring high quality and optimal circuit performance. Key Skills & Re...

Hi Greetings from Eximietas Design! We are actively looking to hire Senior Analog Layout Design Engineers / Leads with 7–15 years of experience to join our growing team. 📍 Locations: Bangalore, Hyderabad & Visakhapatnam. 📅 Notice Period: 30 days or less preferred. Job Description: We’re seeking highly skilled professionals with a strong background in lower FINFET technology nodes (TSMC 5nm preferred) to contribute to cutting-edge analog layout design. Key Skills & Requirements: Expertise in IR drop, Electromigration, self-heating, RC delay, and parasitic capacitance optimization. Solid understanding of how layout impacts circuit performance (speed, area, etc.). Ability to implement layouts t...

Hi Greetings from Eximietas Design! We are actively looking to hire Senior Analog Layout Design Engineers / Leads with 7–15 years of experience to join our growing team. 📍 Locations: Bangalore, Hyderabad & Visakhapatnam. 📅 Notice Period: 30 days or less preferred. Job Description: We’re seeking highly skilled professionals with a strong background in lower FINFET technology nodes (TSMC 5nm/TSMC 7nm preferred) to contribute to cutting-edge analog layout design. Key Skills & Requirements: Expertise in IR drop, Electromigration, self-heating, RC delay, and parasitic capacitance optimization. Solid understanding of how layout impacts circuit performance (speed, area, etc.). Ability to implement ...

Hi Greetings from Eximietas Design! We are actively looking to hire Senior Analog Layout Design Engineers / Leads with (TSMC 5nm / TSMC 7nm preferred) 7–15 years of experience to join our growing team. 📍 Locations: Vizag/Bengaluru/Hyd 📅 Notice Period: 30 days or less preferred. Job Description: We’re seeking highly skilled professionals with a strong background in lower FINFET technology nodes (TSMC 5nm/7nm preferred) to contribute to cutting-edge analog layout design. Key Skills & Requirements: Expertise in IR drop, Electromigration, self-heating, RC delay, and parasitic capacitance optimization. Solid understanding of how layout impacts circuit performance (speed, area, etc.). Ability to i...

Hi Greetings from Eximietas Design! We are actively looking to hire Senior Analog Layout Design Engineers / Leads with (TSMC 5nm / TSMC 7nm preferred) 7–15 years of experience to join our growing team. 📍 Locations: Vizag/Bengaluru/Hyd 📅 Notice Period: 30 days or less preferred. Job Description: We’re seeking highly skilled professionals with a strong background in lower FINFET technology nodes (TSMC 5nm/7nm preferred) to contribute to cutting-edge analog layout design. Key Skills & Requirements: Expertise in IR drop, Electromigration, self-heating, RC delay, and parasitic capacitance optimization. Solid understanding of how layout impacts circuit performance (speed, area, etc.). Ability to i...

Hi....! Greetings from Eximietas Design! We are actively looking to hire Senior Analog Layout Design Engineers / Leads with (TSMC 5nm/TSMC 7nm preferred) 5–12 years of experience to join our growing team. 📍 Locations: Bengaluru/Vizag/Hyd. 📅 Notice Period: Immediate - 15 days Preferred Job Description: We’re seeking highly skilled professionals with a strong background in lower FINFET technology nodes (TSMC 5nm/7nm preferred) to contribute to cutting-edge analog layout design. Key Skills & Requirements: Expertise in IR drop, Electromigration, self-heating, RC delay, and parasitic capacitance optimization. Solid understanding of how layout impacts circuit performance (speed, area, etc.). Abili...

As a candidate for this position, you should hold a Bachelor's degree in Computer Science, IT, a related field, or possess equivalent practical experience. Additionally, you should have at least 5 years of experience in static timing analysis, synthesis, physical design, and automation. It is crucial that you have expertise in physical design tool automation, including synthesis, P&R, and sign-off tools. In addition to the minimum qualifications, preferred qualifications for this role include experience in extracting design parameters, Quality of Results metrics, and analyzing data trends. You should also have knowledge of timing constraints, convergence, and signoff processes, as well as fa...

You will be responsible for the layout of Analog and mixed-signal modules in CMOS and Power Technologies, with a specific focus on DC-DC converters for power management ICs. This includes designing Analog and mixed-signal system resource blocks such as POR, Bandgap, LDO, Oscillator, amplifier, and power FET. You will also be involved in chip floor-planning, pad ring layout, power busing, bonding, and tape-out activities. Your role will require a deep understanding of layout verification processes like DRC, LVS, Latch-up, and Electro-migration. Additionally, you will collaborate closely with designers to define block layout requirements, match patterns, and ensure signal integrity. To qualify...

Greetings from Eximietas Design! We are actively seeking Senior Analog Layout Design Engineers / Leads with 7-15 years of experience to join our expanding team in Bangalore, Hyderabad, and Visakhapatnam. The ideal candidate should have a strong background in lower FINFET technology nodes, particularly TSMC 5nm, to contribute to cutting-edge analog layout design. As a Senior Analog Layout Design Engineer / Lead, you will be responsible for optimizing IR drop, Electromigration, self-heating, RC delay, and parasitic capacitance in layouts. You should have a solid understanding of how layout impacts circuit performance, such as speed and area, and the ability to implement high-quality layouts th...

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and highly skilled engineer committed to advancing the field of high-speed analog design. You bring a wealth of experience in designing critical analog and mixed-signal blocks, particularly for cutting-edge PCIe 6 and PCIe 7 or SerDes PHY solutions. Your techn...

Greetings from Eximietas Design! We are actively seeking to hire Senior Analog Layout Design Engineers / Leads with 7-15 years of experience in lower FINFET technology nodes, preferably TSMC 5nm, to join our team in Bangalore, Hyderabad, or Visakhapatnam. A notice period of 30 days or less is preferred for this position. As a Senior Analog Layout Design Engineer/Lead at Eximietas Design, you will be responsible for contributing to cutting-edge analog layout design. Your expertise in IR drop, Electromigration, self-heating, RC delay, and parasitic capacitance optimization will be essential. You should have a solid understanding of how layout impacts circuit performance, such as speed and area...

Job Description We are seeking a talented and detail-oriented Physical Backend Design Engineer to join our IC (Integrated circuit) development team. The role involves key aspects of physical design, including automated place and route, floorplanning, clock tree synthesis (CTS), static timing analysis (STA), power analysis, and physical verification (DRC/LVS). The ideal candidate will have a strong knowledge of physical design methodologies, experience with industry-standard tools, and a passion for delivering high-quality semiconductor solutions. How You Will Contribute And What You Will Learn Perform floorplanning, partitioning, and optimization to achieve area, power, and performance targe...

You are invited to join Eximietas Design as a Senior Analog Layout Design Engineer/Lead with 7-15 years of experience. We are a rapidly growing team seeking professionals skilled in lower FINFET technology nodes, particularly TSMC 5nm. Your role will involve working on cutting-edge analog layout design projects. Your key responsibilities will include expertise in IR drop, Electromigration, self-heating, RC delay, and parasitic capacitance optimization. A solid understanding of how layout impacts circuit performance, such as speed and area, is essential. You must be able to implement layouts that meet strict design constraints while ensuring high quality. Proficiency in CADENCE/SYNOPSYS layou...

Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwid...

Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwid...

Hi Greetings from Eximietas Design! We are actively looking to hire Senior Analog Layout Design Engineers / Leads with 7–15 years of experience to join our growing team. 📍 Locations: Bangalore, Hyderabad & Visakhapatnam. 📅 Notice Period: 30 days or less preferred. Job Description: We’re seeking highly skilled professionals with a strong background in lower FINFET technology nodes (TSMC 5nm preferred) to contribute to cutting-edge analog layout design. Key Skills & Requirements: Expertise in IR drop, Electromigration, self-heating, RC delay, and parasitic capacitance optimization. Solid understanding of how layout impacts circuit performance (speed, area, etc.). Ability to implement layouts t...

Job Title: Physical Verification Engineer Experience: 4+Years Location: Banglaore Employment Type: Full-time Industry: Semiconductors / VLSI / ASIC Design / Foundry Job Summary: We are looking for a Physical Verification Engineer with strong expertise in physical verification flows to ensure that layouts are signoff-clean and compliant with foundry process design rules. The ideal candidate will be responsible for DRC, LVS, ERC, Antenna, and other checks across block-level and full-chip designs using industry-standard EDA tools. Key Responsibilities: Own and execute block-level and full-chip DRC , LVS , ERC , Antenna , and Density checks. Analyze physical verification violations and debug lay...

Job Title: STA & EMIR Engineer Experience: 4–15 Years Location: Pune, Hyderabad Notice Period: Immediate Joiners Preferred Job Description: We are seeking a skilled and motivated STA (Static Timing Analysis) and EMIR (Electromigration & IR Drop) Engineer with 4 to 15 years of experience in ASIC physical design verification. The ideal candidate will have strong hands-on experience in timing signoff and power integrity analysis, working across advanced process nodes. Key Responsibilities: Perform full-chip Static Timing Analysis (STA) using industry-standard tools (PrimeTime, Tempus, etc.) Drive STA signoff including constraints development, path analysis, ECO implementation, and timing closur...

Hi All, Greetings from Eximietas Design...! We are hiring Senior Analog Layout Design Engineers/Leads. Experience: 4-12 years. Location: Hyderabad Job Description: ❖ Must understand techniques for managing IR drop, Electromigration, self-heating, RC delay and parasitic capacitance optimization. ❖ Understanding layout effects on the circuit such as speed and area. ❖ Ability to understand design constraints and implement high-quality layouts. ❖ Good communication skills and able to work with cross-functional teams. ❖ High level proficiency in C ADENCE/SYNOPSYS layout tools flow. ❖ Hands on experience on lower FINFET technology nodes. ❖ Scripting skills in PERL/SKILL are a plus. Interested Engi...

Requisition #: 15488 Our Mission: Powering Innovation That Drives Human Advancement When visionary companies need to know how their world-changing ideas will perform, they close the gap between design and reality with Ansys simulation. For more than 50 years, Ansys software has enabled innovators across industries to push boundaries by using the predictive power of simulation. From sustainable transportation to advanced semiconductors, from satellite systems to life-saving medical devices, the next great leaps in human advancement will be powered by Ansys. Innovate With Ansys, Power Your Career. Summary The Principal R&D Engineer leads the design and development of innovative solutions. In t...

Looking for EMIR Engineer Job location- Pune. Exp.-5+yrs Prefer- Immediate joiner . Key Responsibilities: Perform IR drop and Electromigration (EM) analysis using tools like RedHawk, Voltus. Define EM/IR methodologies and flows. Collaborate with design teams to improve power grid design and robustness. Ensure sign-off quality results for high-performance SoCs. Create automated checks and regression flows. Required Skills: Strong knowledge of power integrity issues and reliability concerns at advanced nodes. Familiarity with power grid design, decap planning, and current estimation. Hands-on experience with EMIR tools (Ansys RedHawk, Cadence Voltus). Good knowledge of PnR flow and integration...