324 Eda Tools Jobs - Page 8

As a Senior Hardware Design Engineer at Agnisys, you will have the opportunity to work on high-tech semiconductor products by joining our R&D team. We provide a progressive and innovation-driven environment that promotes constant learning, which is crucial for personal and professional growth. Basic Requirements: - A B.Tech degree in Electronics and Communication Systems - Proficiency in Verilog, VHDL, SystemVerilog & C - Experience with FPGA, EDA Tools, Linux, Perl, and Tcl - Excellent communication skills - Ability to work independently with minimal supervision and collaboratively within a team - Strong multi-tasking skills - Self-motivated with a solid team spirit Job Responsibilities: - ...

You are a highly experienced hardware board design engineer with a minimum of 5 years of experience. In this role based in Vadodara, India, you will be responsible for designing hardware boards, demonstrating strong systems knowledge, and the ability to understand high-level concepts efficiently to produce effective results. Your key responsibilities will include working on various stages of hardware product development cycles, specializing in high-speed board design, and demonstrating expertise in protocols such as PCIe, USB3.0, MIPI CSI/DSI, LVDS, HDMI, DDR3/4, SD/eMMC, NAND, SPI/I2C. You should have hands-on experience with peripherals like Image sensors, LCD displays, and flash memory, a...

Qualification: B.E Electrical Responsibilities: Designing of Cables Harness Assemblies, Developing Electrical Interface Schematic and Interconnect involving electrical control panel parts, OEM power supplies, Protection Circuits, Control Circuits. Selections of OEM parts for the design. Preparing Drawings, engineering specification documents and Bom creation for C&H assemblies. Skills Requirement: Hands on experience in Electrical components selections (Control panel components), Circuit Sizing, Connectors and Cables for Harness assemblies based on Cable assembly application. Should have hands on experience on developing Electrical schematics, Interconnects, Cable and Harness design using E3...

As a skilled professional in Standard Cell Library Development, you will leverage your hands-on experience and expertise to contribute effectively to the characterization processes. Your solid understanding of CMOS and FinFET technologies will be key in ensuring the success of the projects at hand. Additionally, exposure to Verilog modeling will be advantageous in this role, although it is not mandatory. Your role will require strong debugging and problem-solving skills specifically related to cell design, SPICE simulation, and characterization. This will enable you to address challenges effectively and ensure the quality of the developed libraries. Proficiency in EDA tools is essential for ...

You should hold a Bachelor or Master of Science degree in Electrical or Electronics engineering, Physics, or a related discipline. With a minimum of 5 years of experience, you must possess knowledge and expertise in the semiconductor field and analog domain. Your familiarity with EDA tools associated with Analog front-end from Cadence will be crucial for this role. Your responsibilities will include analog circuit design and simulations, requiring excellent written and verbal communication skills in English. Additionally, you should be adept at working in a dynamic environment, with strong analytical and problem-solving abilities. You will also be expected to drive discussions and meetings, ...

As a Non-Volatile Engineering (NVE) Product Engineer at Micron Technology, Inc., you will be a key player in the Mask Design Development team, contributing to the Design for Manufacturability (DFM) process for new designs. Your role involves ensuring the timely delivery of high-quality mask designs by collaborating with cross-functional teams, enhancing DFM capabilities, and improving design methodologies for better manufacturability and performance of NAND products. Your responsibilities will include integrating DFM best practices into the design process, developing and enhancing DFM capabilities and tools, providing feedback to the NAND Design team based on DFM and manufacturing experience...

B.E./B.Tech or M.E./M.Tech in Electrical/Electronics Engineering or Physics5+ years of hands-on experience in analog circuit design and EDA toolsStrong command over circuit simulation, layout porting, and analog front-end development Required Candidate profile Develop and support new design/technology porting flows Collaborate with PDK, Modeling, and Device teams Enable and validate schematic layout porting, set up analog simulations

We re Hiring: Sales Engineer Locations: Delhi / Pune / Bangalore Qualification: B.E./B.Tech in Electronics or Mechanical Engineering Experience: 5 10 Years CTC: Open to budget Travel: 70 75% (primarily across defense/government zones) About the Role: Are you passionate about technology and defense innovationWe are looking for a skilled Sales Engineer to join our team and drive business across government and defense sectors. You ll be responsible for the full sales cycle from opportunity identification to closure while collaborating closely with our technical and service teams. Key Responsibilities: Identify and engage key accounts in Aerospace Defense. Understand customer needs and propose t...

Analog Layout Engineer Experience3 to 5 Years QualificationB.E / B. Tech / M.E / M. Tech ESSENTIAL DUTIES AND RESPONSIBILITIES: Candidate should have a strong knowledge on devices and process/fabrication technology. Should have work experience in 7nm, 10nm, 14nm, 16nm etc Good understating of Deep Submicron issues and layout techniques. Expertise on matching, parasitic reduction, ESD, DFM etc. Proficiency in use of below EDA tools for full custom layout and post-layout verification DRC/LVS/DFM etc. Cadence Virtuoso Layout editor (L/XL/GXL) Verification toolsAssura/PVS/Calibre/ Hercules Preferred Skills: Scripting Knowledge of perl/shell/skill are highly preferred Job Category VLSI (Silicon e...

Lead Analog Layout Engineer Experience8 to 10 Years QualificationB.E / B. Tech / M.E / M. Tech Essential Duties & Responsibilities: Candidate should have a strong knowledge on devices and process/fabrication technology. Should have work experience in 7nm, 10nm, 14nm, 16nm etc Good understating of Deep Submicron issues and layout techniques. Expertise on matching, parasitic reduction, ESD, DFM etc. Proficiency in use of below EDA tools for full custom layout and post-layout verification DRC/LVS/DFM etc. Cadence Virtuoso Layout editor (L/XL/GXL) Verification toolsAssura/PVS/Calibre/ Hercules Ability to handle a team Preferred Skills: Scripting Knowledge of perl/shell/skill are highly preferred...

Physical Design Engineer Experience 4-10 yrs Job Overview: Strong background of ASIC Physical DesignFloor planning, P&R, Extraction, IR Drop Analysis, Static Timing and Signal Integrity.. Hands-on experience on technology nodes like 5nm,7nm, 14nm, 10nm. Good knowledge of EDA tools from Synopsys, Cadence and Mentor Hands-on experience in floor planning, placement optimizations, CTS and routing. Hands-on experience in cadence or Synopsys tool (Encounter, ICC, PT/PTSI, TEMPUS, DC, RC, VOLTAS) Job Category VLSI (Silicon engineering) Job Location IndiaBangalore IndiaChennai IndiaHyderabad IndiaNoida

We are seeking a highly skilled and motivated Mixed Signal Verification Engineer to join our team with 8+ years of expeirence. As a Mixed Signal Verification Engineer, you will be responsible for developing and implementing testbenches, checkers, and tests using System Verilog. You will also play a key role in creating and utilizing real-numbered analog behavioral models in System Verilog/Verilog-AMS for verification simulations. Ownership of Analog/Mixed designs at the chip and/or block level will be an important aspect of this role. Responsibilities: Develop and build Mixed-Signal testbenches, checkers, and tests using System Verilog. Create and utilize real-numbered analog behavioral mode...

We are seeking a skilled and motivated DDR5/SerDes Verification Engineer to join our organization. As a DDR5/SerDes Verification Engineer, you will be responsible for verifying and validating the functionality and performance of DDR5 memory subsystems and high-speed SerDes interfaces. In addition to strong DDR5 and SerDes verification expertise, knowledge and experience with sideband I2C and I3C protocols would be considered a plus. Candidate should have Design and implement advanced verification environments and test benches using SystemVerilog/UVM Experience4-10 Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore

Experience: 5 to 12 years Location: Bangalore : We are seeking a highly skilled Design Verification Engineer to join our team in Bangalore. The ideal candidate will have 5 to 12 years of experience in IP and SOC verification and possess a strong background in SystemVerilog (SV) and Universal Verification Methodology (UVM). This role specifically requires expertise in GLS (Gate-Level Simulation). Key Responsibilities: IP and SOC Verification Conduct IP and SOC verification activities to ensure the functionality and correctness of integrated circuits. SystemVerilog (SV) and UVM Proficiency Demonstrate strong knowledge of SystemVerilog and Universal Verification Methodology for efficient and ef...

Number of Open Positions: 7 Experience: 4 to 7+ years Location: Bangalore : We are seeking highly skilled and motivated DFT-DV Engineers to join our dynamic team in Bangalore. As a DFT-DV Engineer, you will play a pivotal role in ensuring the quality and reliability of our digital designs through Design for Test (DFT) and Design Verification (DV) methodologies. The ideal candidates should possess a minimum of 4 to 7+ years of experience in the field, with a strong background in DFT DV flow, JTAG, MBIST, SCAN, PG, PHY-LP, and BSCAN. Key Responsibilities: DFT Implementation: Collaborate with design and verification teams to define and implement DFT strategies and methodologies that enable effi...

Calling all innovators and creators!Were hiring RTL Design Engineers for Bangalore to work on complex ASICdesigns and integrations.Experience Required3"“25 YearsKey Skills: RTL design, low-power methodologies, scripting (Perl, Python, TCL)Join us and design the future of technology! Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore

Strong understanding of DFX concepts: DFT, DFM, DFA, DFR Experience in semiconductor, electronic hardware, or embedded product development Proficiency in DFT/DFM tools and methodologies FMEA, FTA, reliability analysis, and root cause problem solving

As an Analog Layout Engineer at ARF Design Pvt Ltd, you will be responsible for designing and developing analog layout IP blocks and full-chip integration. Your role will involve performing and resolving LVS/DRC violations independently, collaborating with circuit design teams to optimize layout quality and performance, and ensuring layouts meet design matching and parasitic constraints. You will have the opportunity to work with advanced nodes like 7nm, 16nm, and 28nm, leveraging your 3+ years of relevant Analog Layout experience. Key Responsibilities: - Design and develop analog layout IP blocks and full-chip integration - Perform and resolve LVS/DRC violations independently - Collaborate ...

As a Systems Engineer at Texas Instruments (TI), you will have the opportunity to work in a vibrant and dynamic team-oriented environment, contributing to a variety of state-of-the-art applications daily. Your responsibilities will include researching and defining new product strategies, analyzing key end-equipment in various sectors, negotiating IC development tradeoffs, and serving as the technical expert for product ramp-up. You will also be involved in silicon system evaluation, application support, troubleshooting customer issues, and driving design wins for new and existing products. In this role, you will collaborate closely with design, product, test, packaging, marketing, and sales ...

As a member of the Common Hardware Group (CHG) at Cisco, you will be part of a team that delivers cutting-edge silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. Our work involves designing networking hardware for Enterprises, Service Providers, Public Sector, and Non-Profit Organizations worldwide. Join us in shaping Cisco's groundbreaking solutions by participating in the design, development, and testing of advanced ASICs that are at the forefront of the industry. Your role will involve implementing Hardware Design-for-Test (DFT) features that support ATE, in-system test, debug, and diagnostics requirements of the designs. You will collabora...

The company is seeking an individual with expertise in underwriting technology infrastructure projects, specifically in the semiconductor domain. You will be responsible for assisting the leadership team in completing the final investment due diligence process for a $500M cross-border semiconductor manufacturing project in India and the USA. Your main responsibilities will include reviewing and responding to due diligence questionnaires from global investors and fund managers, providing a detailed underwriting analysis of the semiconductor project, and supporting documentation related to financial modeling, technology validation, operational planning, risk identification, and compliance with...

The successful candidate will operate as a senior member of the CAD department library team. Responsibilities include creating and updating component CAD schematic symbols and footprint geometry. You will interface with internal staff, PWB designers, department managers, component engineers, CAD tool administrators, and outside subcontractors in the fast-paced execution of a variety of circuit board projects. There is growth potential for a permanent position with managerial responsibility. Preferred Qualifications: - Bachelor's or Associate degree in Electrical/Electronics, Computer Science, Mathematics, or a related field. - 4+ years of experience in CAD library and/or PWB design. - Workin...

: 6 to 8 years of Semiconductor industry experience in Custom Mixed-Signal layout design with a bachelors degree in electrical/Electronic Engineering. Able to deliver Custom analog layouts independently from schematic to layout generation, estimating the area, optimizing floorplan, routing, and complete verification flows. Firsthand experience in critical analog layout design blocks such as Temperature sensor, Serdes, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc. Good at LVS/DRC debugging skills and other verifications for lower technology nodes - 14nm FinFet and below. Good understanding of Matching, EM, ESD, Latch-Up, Shi...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As SoC Verification engineer, the candidate will be responsible to own SoC Interconnect DV (Connectivity matrix, Coherency, Clock gating, Performance etc) during the project work. Responsibilities Understand the design specification and implementation, define the verification scope, develop test plans, tests, and the verification infrastructure and verify the correctness of the design. Work alongside other members of the verification team to analyze, develop and execute verification test cases and able to provide relevant solution to issue. Collaborate with architects, designers, and pre and post silicon v...