491 Eda Tools Jobs - Page 6

Responsibilities: * Collaborate with cross-functional teams on SOC verification * Develop testbenches using System Verilog and Verilog * Ensure compliance with industry standards and customer requirements

As a Physical Design Specialist at AMD, you will play a crucial role in troubleshooting critical issues, providing independent analysis, and identifying potential failures in the physical design of semiconductor products. Your expertise in CPU Cores physical design, EDA tools, and unbiased problem-solving abilities will ensure execution excellence and optimal performance for CPU cores. Let's delve into your responsibilities and qualifications: **Key Responsibilities:** - **Critical Issue Resolution:** - Identify and resolve complex physical design problems, especially related to CPU core physical design like timing closure and signal integrity. - **Securing Execution Excellence:** - Ensure h...

As a part of Kinara, a Bay Area-based venture backed company, your role will involve developing verification environments for modules, subsystems, top level, and FPGA. You will be responsible for building models, checkers, and random test frameworks using SystemVerilog and UVM. Additionally, you will participate in Low power analysis (UPF), power estimation, and C modeling. Your tasks will also include performing lint, CDC, code coverage, functional coverage, and formal verification of modules using SVA assertions. Key Responsibilities: - Develop verification environments for modules, subsystems, top level, and FPGA - Build models, checkers, and random test frameworks using SystemVerilog and...

As an ASIC STA Engineer at NVIDIA, you will be an integral part of the outstanding Networking Silicon engineering team, contributing to the development of cutting-edge high-speed communication devices for AI platforms. Your role will involve the following key responsibilities: - Be responsible for full chip and/or chiplet level STA convergence from the early stages to signoff. - Participate in top-level floor plan and clock planning activities. - Collaborate with CAD signoff flows and methodologies to optimize performance. - Integrate timing for digital partitions and analog IPs, providing feedback to PD/RTL and driving convergence. - Define and implement constraints for various work modes i...

Role Overview: You will be responsible for leading the architecture, design, and verification of digital blocks for mixed-signal ASICs. Your role will involve collaborating closely with Analog and System teams, guiding RTL design, optimizing power, performance, and area, and contributing to IP reuse strategy and design methodology improvements. Additionally, you will provide technical leadership across cross-functional teams and support post-silicon validation. Key Responsibilities: - Lead the architecture, design, and verification of digital blocks for mixed-signal ASICs - Collaborate closely with Analog and System teams to define specifications and ensure seamless integration - Drive RTL d...

As a Frontend Principal Engineer specializing in Semiconductor Chip Design, your role involves leading and coordinating the execution of the front-end stages of integrated circuit development. You must possess a strong technical background in digital design, verification, and project management skills. Your responsibilities include overseeing product support activities for both the Pre-production and Post-production stages to ensure successful initiation, development, and sustainment of semiconductor designs. Key Responsibilities: - Minimum 8+ years of experience in System Architecture for ARM-based MCU product development - Minimum 8+ years of experience in RTL Design, Coding, and RTL Integ...

Role : EMIR Engineer Qualification : Btech /Mtech Electronics Engineering / VLSI Work Location : Hyderabad Work Mode: work From Office Notice Period expectation : Immediate to 45 Days Skills required Experience in ASIC EMIR/PD flow and EDA tools. Experience in IR and EM Analysis tool as Redhawk-SC , Redhawk . Analyze EMIR violations and provide implementation choices to Physical design Scripting language experience: Python, perl, shell preferred. Knowledge of the PnR tools is added advantage Responsibilities EMIR flows running through RHSC Tool Good at Python scripting Functional Skills Strong verbal and written communication skills

As a Principal Engineer - Analog IP/IC specializing in Semiconductor Chip Design, your role involves leading and coordinating the execution of analog and mixed-signal integrated circuit development projects. You must possess a strong technical background in analog design, verification, and physical implementation, along with exceptional project management skills. Your responsibilities will include: - Designing analog/mixed-signal blocks such as ADC/DAC, PLL, LDO/DCDC, IO, Motor & Gate Drivers. - Running MATLAB modeling, circuit simulations, and post-layout analysis (LPE, Monte Carlo). - Developing and managing verification plans, mixed-signal simulation, and behavioral models. - Guiding cust...

As a highly motivated Senior Hardware Engineer at Allegion, you will play a pivotal role in the design and development of high-quality hardware solutions. You will work collaboratively in a cross-functional environment to ensure successful project outcomes and contribute to the overall product design and development cycle. The ideal candidate thrives in a fast-paced design culture and possesses strong technical skills in hardware design. **Key Responsibilities:** - Play a key role in the design and development of hardware solutions, collaborating with a larger team for successful project outcomes. - Develop and refine hardware architectures to meet functional requirements. - Design embedded ...

As a DFT Technical Manager at NextSilicon, you will play a crucial role in the DFT implementation of the company's next SOC. Your primary focus will be on developing and implementing testing methodologies to ensure the functionality, reliability, and manufacturability of integrated circuits (ICs) and other hardware designs. Your responsibilities will include developing DFT flow/methodologies, managing a team of 3-4 DFT engineers, and ensuring thorough testing and fault coverage alignment with industry standards. **Role Overview:** NextSilicon is reimagining high-performance computing with accelerated compute solutions and a software-defined hardware architecture. As a DFT Technical Manager, ...

You have experience in Mixed-Signal layouts and must have worked with TSMC 7nm / 5nm FINFET technology. It is also preferred that you have knowledge of keywords like 22FDX / 12FDX / FDSOI. Your responsibilities will include working on various Mixed-Signal layout blocks such as: - High-speed SerDes like Transmitter(Tx), Receiver(Rx), PLL, USR, LNA, etc. - Analog-to-Digital Converters (ADCs) such as Successive Approximation (SAR) ADC, Delta-sigma () ADC, Dual Slope ADC, Pipelined ADC, Flash ADC. - Digital-to Analog Converters (DACs) including Weighted Resistor DAC, R-2R Ladder DAC. - GPIO, XTAL, Auxiliary cells. - High-speed IOs like DDR2/3/4, MIPI, SATA, USB, LVDS, etc. You should have hands-...

Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today's needs and tomorrow's next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we're living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globa...

Job Summary: We are seeking a skilled and passionate EDA (Electronic Design Automation) Tool Developer to join our CAD/EDA team. In this role, you will be responsible for designing, developing, and maintaining EDA tools, flows, and scripts that support our hardware design teams. You will collaborate closely with RTL, DFT, Physical Design, and Verification teams to improve design productivity, performance, and automation. Key Responsibilities: Design, develop, and maintain internal EDA tools, scripts, and flows to support digital and/or analog design processes. Automate various aspects of the design flow, including synthesis, place-and-route, verification, and signoff. Develop custom front-en...

Description: We re looking for a CAD Engineer with strong programming skills in Python and experience using or developing EDA tools. The role involves automating design flows and supporting tool development for analog/digital domains. LOCATION: Bangalore / Hyderabad

We are looking for a skilled Technical Manager with 10+ years of experience to lead our Chip Design Front End team in Bangalore. The ideal candidate will have a strong background in project management, digital design, verification, and synthesis, as well as experience with EDA tools. Roles and Responsibility Manage front-end stages of semiconductor chip design projects. Lead technical teams to achieve project goals and objectives. Develop and implement project plans and schedules. Coordinate with cross-functional teams to ensure successful project execution. Identify and mitigate risks associated with chip design and development. Ensure compliance with industry standards and best practices. ...

We are looking for a skilled professional with 7 to 15 years of experience in Design Verification to join our team. The ideal candidate will have expertise in SV/UVM Test Bench Development and protocols such as PCI Express, UCIe, CXL, AXI, ACE, CHI, Ethernet, RoCE, RDMA, DDR, LPDDR, or HBM. Roles and Responsibility Develop and implement test benches using SV/UVM methodology. Collaborate with cross-functional teams to identify and prioritize verification requirements. Create and execute test cases to ensure design quality and reliability. Analyze and debug issues found during testing. Participate in the development of verification plans and strategies. Work closely with designers to resolve d...

We are looking for a skilled Design Verification Engineer with 6 to 11 years of experience. The ideal candidate will have expertise in System Verilog and UVM, PCIe, Ethernet, and solid Linux environment skills. This position is available in Bangalore, Hyderabad, and Ahmedabad. Roles and Responsibility Develop and implement verification environments using System Verilog and UVM. Verify IP, SOC, and pre-silicon designs. Collaborate with cross-functional teams to identify and resolve design issues. Create and maintain testbenches and testcases for verifying complex digital circuits. Analyze and debug verification results to ensure design quality. Participate in the development of new verificati...

AMS Verification Job Location: Bangalore Job Description: 4-6 yrs of exp in mixed-signal verification of chip Experience with mixed signal / co-simulation (analog, digital) verification methodologies Experience writing verification plans, creating test benches and automating regression test suites, preparing and presenting detailed verification reviews Experience developing behavioral models for analog IPs in WREAL, Verilog-AMS Understand and debug digital RTL and analog schematics Working knowledge of state-of-the-art EDA tools: Cadence Virtuoso, Cadence Incisiv/Xcelium, Cadence Vmanager Strong background in verification languages and methodologies (e.g. Verilog, SystemVerilog, UVM, SVA). E...

Hardware Design Engineer Location: Bangalore Exp: 5+ Yrs Max NP: 30 Days Max salary : 20 LPA(based on exp and skills) Primary Skills: candidate should have to work on electronics products designing (Mandatory) Education: B.E/B.Tech, M.E/M.Tech Skill Candidate 1 Exp Levels Candidate 2 Hardware Design Design Engineering calculations using Mathcad, Excel Simulation Electronics Products EDA tools - Cadence Orcad/ Allegro/ Altium Designer Automotive EMI/EMC standards PCB Job Description: HW project team member, responsible of a dedicated HW module Mandatory skills - Must have Automotive domain experience. If yes, how much Experience with engineering calculations using Mathcad, Excel etc. If Yes, ...

Title: Hardware Design Engineer Experience : 5 to 7 years Location: Bangalore Experience in Embedded hardware Design Experience in Hardware design development life cycle Knowledge on Processor / Microcontroller / FPGA / DSP based hardware design Schematic Design using EDA tools Coordinating PCB Layout team Board bring up and functional testing Electrical validation of high speed interfaces Handling lab equipment - scope, BERT, Logical and protocol analyser Good communication skills

Expeience - 17 Years - 25 Years The role will lead and manage IT teams focused on: Development of Software solutions enabling High-Performance Compute grid Development of large-scale, distributed, analytical applications. Components and services for Compute Grid infrastructure optimization SCM (Source Code Management) and Application life cycle management CI/CD Systems for VLSI Design Multi-stage data integrations with EDA tools and CAD flows Development of Hardware IP Management Systems Cloud-based, petabyte-scale Data Platforms (preferably GCP) Development of Machine Learning solutions and pipelines

We are seeking an exceptional Senior Physical Design Engineer to take a key role in our semiconductor design team. As a Senior Physical Design Engineer, you will lead the development and implementation of cutting-edge physical design methodologies and flows for complex ASIC designs. You will collaborate closely with cross-functional teams to ensure the successful delivery of high-quality designs Key Responsibilities Perform Synthesis, floor planning, placement, Clock, routing, and PPA optimization for High Speed Advance ASICs. Define and drive physical design strategies to meet aggressive performance, power, and area targets. Conduct detailed analysis of timing, power, and area, and drive de...

About The Role Your Role As a SoC GLS Verification Engineer , you will play a key role in verifying complex SoC designs through Gate-Level Simulation (GLS). You will work closely with design and verification teams to ensure functional correctness, timing accuracy, and overall quality of silicon-ready designs. Your expertise in GLS methodologies and debugging will be critical in delivering high-performance, reliable SoCs. In this role, you will: Perform GLS using Zero Delay , SDF , and Post-Layout GLS (PAGLS) techniques. Debug and resolve issues in gate-level simulations to ensure timing and functional correctness. Develop and maintain SystemVerilog/UVM testbenches for GLS environments. Colla...

Alternate Job Titles: Senior CAD Engineer Senior Physical Verification Engineer Senior EDA Tool Developer Senior Design Enablement Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an enthusiastic and forward-thinking engineer who thrives in dynamic, multicultural environments and is passionate about pushing the ...

Role Overview: You should hold a Bachelor or Master of Science degree in Electrical or Electronics engineering, Physics, or a related discipline. With a minimum of 5 years of experience, you must possess knowledge and expertise in the semiconductor field and analog domain. Your familiarity with EDA tools associated with Analog front-end from Cadence will be crucial for this role. Key Responsibilities: - Analog circuit design and simulations - Excellent written and verbal communication skills in English - Ability to work in a dynamic environment with strong analytical and problem-solving abilities - Drive discussions and meetings - Coordinate and track follow-up actions effectively Qualificat...