492 Eda Tools Jobs - Page 3

Design and prototype mixed-signal PCBs (4+ layers) with high-speed interfaces (DDR, USB, PCIe, MIPI). Integrate FPGAs/processors, validate circuits, ensure EMI/EMC compliance, support SI/PI, DFM/DFT, and collaborate across teams.

As an ASIC/FPGA Designer, you will work closely with Algorithm and Architecture teams to understand and translate high-level algorithmic requirements into efficient hardware implementations. You will learn and analyze relevant protocols and standards, interpreting protocol specifications such as Ethernet, and applying them accurately in design. Your responsibilities will include: - Participating in all design stages, including micro-architecture definition, RTL coding (using Verilog/SystemVerilog/VHDL), and synthesis-friendly coding with timing-aware design. - Collaborating cross-functionally with the verification team for testbench development, debug support, and functional coverage closure...

Role Overview: You will work with the Non-volatile Memory Design team at Sandisk to architect, design, and develop Nonvolatile memory products utilizing state-of-the-art technologies. Your responsibilities will include designing critical circuits, working closely with layout engineers, participating in full chip verification, documenting module specifications, proposing innovative circuit solutions, mentoring junior engineers, and ensuring timelines and quality of assigned assignments. Key Responsibilities: - Design, simulate, and verify critical circuits like Voltage regulators, LDO, Current and Voltage reference, High Voltage charge pumps, temperature sensors, oscillators using industry st...

As an Electrical, Electronics, or Computer Science Engineer at Cadence, you will play a crucial role in the verification and debugging of digital systems. Your responsibilities will include: - Having a very good understanding of HDLs such as Verilog and/ or VHDL - Prior experience in simulation/emulation using Verilog and/or VHDL - Proficiency in EDA tools, especially Cadence, for debugging design/verification problems - Experience in process automation through scripting - Familiarity with SystemVerilog, C++, and UVM - Conducting Functional Verification of complex digital systems like SoC Verification using SystemVerilog - Designing and implementing complex functional verification environmen...

Role Overview: You will be joining our Flow Development Team as an EDA Flow Developer, where you will play a crucial role in designing and developing Flows for IR and EM technology-based solutions for ASIC designs. Your main focus will be on ensuring signal integrity, power integrity, and thermal management for cutting-edge projects. Collaborating with cross-functional teams and staying updated with the latest advancements in IR and EM technology will also be key aspects of your role. Key Responsibilities: - Design and develop Flows for IR and EM technology-based solutions for ASIC designs, with a focus on signal integrity, power integrity, and thermal management. - Collaborate with cross-fu...

As a senior physical design engineer, your role involves mentoring and coaching junior team members throughout the design process. You will provide technical guidance and support, ensuring optimal design quality and performance. Your responsibilities include: - Reviewing and providing feedback on floorplans, placement, and routing strategies. - Guiding the team in achieving timing closure targets through effective analysis and optimization techniques. - Collaborating with cross-functional teams to address design challenges and meet project goals. - Developing and maintaining best practices for physical design implementation. - Staying updated with industry trends and advancements in physical...

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a driven and collaborative sales leader with a passion for technology and a deep understanding of the semiconductor and EDA landscape. Your career demonstrates a consistent record of exceeding revenue targets and building strong, trust-based relationships with enterprise c...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

Position Title: Senior EDA Engineer Cadence Virtuoso, SKILL/CDF, Tool Integration Role Overview: We are seeking a highly skilled EDA Engineer with solid experience in Cadence Virtuoso environments and a deep understanding of OpenAccess databases, SKILL scripting, foundry PDK/CDK integration, and schematic/layout tool automation. This role will collaborate closely with AI/EDA development teams to build seamless design flows and robust automation for our AI-powered analog design platform. Key Responsibilities: Develop, maintain, and optimize analog/mixed-signal IC design flows in Cadence Virtuoso and related EDA tools. Create, modify, and optimize SKILL scripts for automation of layout, schema...

At Capgemini Engineering, the world leader in engineering services, you will be part of a global team of engineers, scientists, and architects dedicated to helping innovative companies unleash their potential. Your role will involve providing unique R&D and engineering services across various industries, contributing to cutting-edge projects such as autonomous cars and life-saving robots. Join us for a career full of opportunities where you can make a difference every day. Key Responsibilities: - Timing Analysis & Closure - Perform setup, hold, and skew analysis across Full-Chip, Sub-system, and IP levels. - Achieve timing closure by resolving violations and optimizing paths. - Constraint De...

Position: PD CAD Engineer (SI80FT RM 3639) Key Responsibilities: Develop and support automated physical design (PD) CAD flows, including floorplanning, placement, and routing optimization. Customize and optimize physical design flows using industry-standard EDA tools (such as Synopsys Fusion Compiler, Cadence Innovus). Collaborate with the design and CAD teams to improve PD workflows, ensuring robust and efficient flow from RTL to GDSII. Implement automation scripts using TCL, Perl, and Python to improve flow reliability and reduce design cycle time. Perform tool evaluations and benchmarking to keep PD flows up-to-date with the latest EDA advancements. Provide documentation, training, and su...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiencesfrom AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challengesstriving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Toge...

Key Responsibilities: -Implement and Verify DFT methodologies for SoCs on all aspects of DFT including IJTAG, BScan, -Work with design, verification and synthesis teams to ensure successful DFT implementation - Perform scan insertion, ATPG, and memory BIST -DFT simulations and debug for all DFT methodologies -Know-how of Industry standard DFT EDA tools \#L1-LK1 onsemi*(Nasdaq: ON) is driving disruptive innovations to help build a better future

Proficiency in databases, and Python, NLP & Machine learning Imm - 10 days max please call me 8217730484 or rachnabhagat4@gmail.com

As an Analog Design Engineer at onsemi's Image Sensors Group in Bengaluru, India, you will collaborate with the design team on block level/Sub System IP/ Top level design and verifications. You will work on generating feasibility reports for image sensor products, focusing on block level and top-level design and verification for 1D and 2D stacked image sensors. Collaboration with the analog layout team for layout reviews and EMIR simulations will be a key aspect of your role. You will also work closely with other teams such as digital, physical design, and product engineering during design and silicon bring up. Maintaining documentation and checklists for deliverables as per the New Product ...

Expertise in one or more of the following domains: Power Optimization, Timing Optimization, Functional Safety Analysis. Experience with industry-standard Electronic Design Automation (EDA) tools from vendors such as Synopsys, Cadence, or Siemens EDA.

We are seeking an experienced System on Chip (SoC) Architect to join our development team. The ideal candidate will be involved in designing, integrating, and optimizing SoC hardware architectures and ensuring seamless software-hardware co-development. You have: Bachelors Degree in Electrical Engineering, Computer Engineering, or a related field (Masters or Ph.D. preferred). Overall,15+ years of experience as a Chip design expert. 8+ years of proven experience in IC design, SoC architecture, or a similar role. Proficiency in hardware description languages: Verilog, VHDL, and System Verilog Expertise in EDA tools for IC design and verification: Mentor Graphics, Cadence, or Synopsys Strong und...

Job Summary We are seeking an experienced GLS Lead to drive gate level simulation activities, including power-aware GLS, formal verification, and MCP verification. The ideal candidate will lead a team of engineers, ensuring timely delivery of all verification projects and maintaining high quality standards. Key Responsibilities Lead and manage the GLS team, providing technical direction and mentorship. Plan, execute, and oversee gate level simulation (GLS) flows for complex SoC designs. Drive power-aware GLS and ensure coverage of low power verification scenarios. Oversee formal verification and MCP verification activities, ensuring completeness and correctness. Collaborate with design, DV, ...

Job Title: Formal Verification Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate engineer with a keen interest in the intricate world of formal verification and EDA tool validation. You thrive on solving complex technical problems and are motivated by the challenge of ensuring the highest standards f...

Proficiency in C++ (incl. C++17/20), Qt, Python, and Perl. Strong experience with EDA tools licensing frameworks (e.g., FlexLM). (Perl, Python, Shell) for automation. Experience with tools like JIRA, BitBucket, CMake, Git, Jenkins, etc.

Proficiency in C++ (incl. C++17/20), Qt, Python, and Perl. Strong experience with EDA tools licensing frameworks (e.g., FlexLM). (Perl, Python, Shell) for automation. Experience with tools like JIRA, BitBucket, CMake, Git, Jenkins, etc.

Job overview and responsibility 1. We are looking for a Memory Design Engineer to contribute to a highly innovative team by designing and developing high quality SRAM and ROM. You will work with other team members on the new process design challenges. You will have the chance to create novel low power and high-performance circuits and develop in-house design and verification flows for SRAM and ROM design in the context of ISO26262. MAJOR RESPONSIBILITIES As a part of SRAM/ROM Design team, you would be working on: 1. Architecture definition and schematic design of RAM and ROM compilers to get the most optimal circuit in terms of power and performance. 2. Verification of leafcells/circuit bloc...

As a senior member of the CAD department library team, your role overview includes creating and updating component CAD schematic symbols and footprint geometry. You will collaborate with internal staff, PWB designers, department managers, component engineers, CAD tool administrators, and outside subcontractors to execute a variety of circuit board projects efficiently. The position also offers growth potential for a permanent role with managerial responsibilities. Key Responsibilities: - Analyze component specifications to develop CAD libraries meeting customer requirements. - Create CAD library symbols/parts based on datasheets and specifications, often with team input. - Stay updated on ne...

As an Analog Layout Engineer at ARF Design Pvt Ltd, you will be responsible for designing and developing analog layout IP blocks and full-chip integration. Your role will involve performing and resolving LVS/DRC violations independently, collaborating with circuit design teams to optimize layout quality and performance, and ensuring layouts meet design matching and parasitic constraints. You will have the opportunity to work with advanced nodes like 7nm, 16nm, and 28nm, leveraging your 3+ years of relevant Analog Layout experience. Key Responsibilities: - Design and develop analog layout IP blocks and full-chip integration - Perform and resolve LVS/DRC violations independently - Collaborate ...